Managing EMI in High-Density Integration

The relentless drive for higher performance and increased functional integration has ushered in new challenges for managing electromagnetic interference (EMI) in densely packed mixed-signal environments.

Integrating analog, RF, and digital circuits into a single system-on-chip (SoC) or advanced package requires solutions that reduce system size and improve performance. However, this tight integration increases the risk of EMI, as digital circuits can generate noise that interferes with sensitive analog and RF components.

“SoC integration is highly desirable for high-volume consumer applications because it reduces both cost and complexity,” says Jian Yang, senior director of technical product management at Synopsys. “Whenever integration is feasible, and for applications where SoC integration is possible, it is going to happen. When RF receivers are integrated with digital functions on the same chip, however, digital noise can overwhelm the RF signal, necessitating robust isolation techniques.”

Advanced packaging technologies like 2.5D and 3D/3.5D integration further complicate EMI management. Combining multiple SoCs, memory units, power management ICs, and RF transceivers into a single module enables unprecedented functional density. Yet, placing individual chips side by side or stacking them vertically increases the risk of signal degradation, crosstalk, and instability across the entire system.

As power levels and operating frequencies continue to creep up, conventional shielding techniques are losing their effectiveness. The reduced physical space between sensitive components exacerbates electromagnetic coupling, making it increasingly difficult to maintain signal integrity. Analog and RF circuits, which are highly susceptible to noise, can suffer from crosstalk or signal distortion due to high-frequency switching noise from nearby digital circuits.

The growing sensitivity of modern systems
Increasingly complex modulation schemes affect signal-to-noise ratios. Weaker signals, which are essential for advanced communication protocols, are more vulnerable to both intentional and unintentional interference. On the RF side, these signals are incredibly small.

“A GPS receiver must detect extremely weak signals from satellites that are far away — signals that are barely above the thermal noise level,” adds Yang. “The RF receiver circuit needs to be highly sensitive to pick up these microvolt-level signals. However, when such an RF receiver is integrated into the same chip as digital functions, significant challenges arise. Digital circuits are switching circuits operating at much higher voltage levels, around one volt. The switching noise from these digital circuits can overwhelm or saturate the sensitive RF receiver, burying the desired signal in interference.”

EMI doesn’t just disrupt signals; it can lead to receiver desensitization. If an RF transmitter emits unwanted energy, even if it’s filtered out before reaching the antenna, that energy might still linger. If the transmitter and receiver aren’t well isolated, this extra energy can bleed into the receive side, decreasing the signal-to-noise ratio. This makes it harder to pick out that low-level signal from the noise floor, leading to desensitization.

EMI can have similar detrimental effects for digital ICs at the most advanced process nodes. As transistor dimensions shrink to 7nm, 5nm, and beyond, the reduced noise margins and lower threshold voltages mean that even minimal electromagnetic coupling can induce logic errors, timing violations, or signal integrity issues.

In these advanced nodes, high-frequency switching activity generates significant electromagnetic fields that can interfere with neighboring circuits. The close proximity of wires and components exacerbates crosstalk and coupling effects, potentially leading to unexpected behavior or system instability. This is particularly critical in high-speed data paths and clock distribution networks, where precision and timing are paramount.

Addressing these challenges starts early in the design phase, where designers must adopt a range of EMI management techniques, including compartmentalized shielding, grounding strategies, and careful layout planning to isolate high-frequency signals between analog, RF, and digital components.

Consider an SoC that houses both a high-speed digital processor and a sensitive analog-to-digital converter (ADC). If they’re too close, the switching noise from the processor can couple into the ADC, degrading its performance. By arranging the layout strategically, designers can mitigate this risk from the outset.

Shielding and isolation
Shielding is one of the most effective methods for managing EMI in high-density semiconductor packages. It involves enclosing sensitive components in conductive or magnetic materials that prevent electromagnetic waves from penetrating or escaping. By containing these waves, shielding reduces interference that can degrade the performance of circuits. Without shielding, the RF receivers can experience signal degradation or loss.

“Robust shielding requires complete enclosure of the sensitive components with high conductivity and/or high permeability material,” says Dick Otte, president and CEO of Promex Industries. “The shield must be continuous and thick enough to attenuate the frequency and intensity of the electromagnetic interference of concern.”

Materials such as copper, aluminum, or alloys like mu-metal (a nickel-iron alloy) can absorb and redirect magnetic fields.

“These materials are typically tens of microns thick, which shield most devices from RF of 1 MHz,” adds Otte. “Mu-metal shields against low-frequency magnetic fields. There are innovations in methods to apply shielding for specific applications.”

Guard rings are conductive loops that encircle sensitive analog circuits, connected to a clean ground reference. They act like moats around a castle, providing a barrier against unwanted electrical noise. Any stray signals that encounter the guard ring are shunted to ground before they can infiltrate the protected circuit, effectively isolating substrate noise.

“In semiconductor manufacturing or in the process technology, the typical process approach is to put isolation rings, like guard rings, around the sensitive devices or sensitive circuitry,” says Yang. “Another typical process technology available in pretty much every fab is to do trenches, like the shallow trench isolation or even deep trench isolation. Those are the typical techniques to isolate the analog sensitive circuitry from digital circuitry.”

Ground planes are large areas of conductive material embedded within the IC layers. They serve as reference points for the circuit’s ground and act as barriers to electromagnetic fields. Incorporating ground planes within the IC’s architecture provides additional defense against EMI.

Isolation is another key strategy for managing EMI within a package, especially when RF, analog, and digital circuits are closely integrated. The principle behind signal isolation is to prevent EMI from propagating between components by surrounding sensitive circuits with conductive materials that block unwanted signals.

This compartmentalization is critical in preventing stray signals from affecting the performance of RF transceivers and other sensitive components. In advanced packaging, this may involve the use of metal shielding structures or advanced materials for low-frequency magnetic interference. Additionally, trench isolation and through-silicon vias (TSVs) are often used to minimize parasitic inductance and capacitive coupling, helping to reduce the spread of electromagnetic fields across the system.

“Through-silicon vias are the best option to provide interconnect solutions with the lowest parasitics,” says Brian Hwang, vice president, fellow and manager of Amkor Technology Korea’s System Solution Group. “Microbumps are also an excellent choice to provide sufficient interface numbers and capacity within a limited die area. They are key features that will enable the integration of chiplets with RF/analog dies and high-end digital memory in the future.”

Using differential signaling for analog circuits is also a clever way to combat EMI. In this approach, signals are transmitted over two complementary traces. Any noise that couples into both lines equally can be canceled out at the receiving end. This technique enhances immunity to external EMI and is widely used in high-speed data communication within ICs. It’s like having a conversation in a noisy room by focusing on the differences in tone rather than the absolute sound levels. By transmitting signals differentially, the system becomes more robust against common-mode noise, improving overall signal integrity.

In addition to shielding, minimizing the size of the device itself can reduce its susceptibility to interference. Smaller devices have shorter signal paths, reducing the likelihood of electromagnetic coupling. Careful placement of components is crucial. By positioning analog and digital blocks in separate areas of the chip or package, engineers can further reduce interference.

“Minimizing interference requires designing shielding that completely encloses sensitive components with metals of high conductivity or permeability, using specific structures to address the interference of concern,” says Promex’s Otte. “The smaller a device, the less susceptible it is to electromagnetic interference. We work with designers to ensure we can build these required structures and provide guidance to designers on how to build devices and subassemblies that are physically small. This requires involving the assembly team in the early stages of device design.”

Thermal management also plays a crucial role, as heat generated by high-frequency digital and RF circuits can exacerbate EMI issues if not properly dissipated.

By optimizing the placement of components, using thermally conductive materials, and implementing efficient heat sinks, designers can improve both thermal performance and EMI resistance. Ensuring that the system remains stable even in high-density, high-power applications is essential for maintaining signal integrity.

Testing and validation: Ensuring performance
As operating frequencies soar into the gigahertz range and beyond, maintaining signal integrity becomes an increasingly complex challenge. High-frequency signals are more susceptible to crosstalk and interference, making rigorous testing and validation essential to ensuring components function correctly in densely packed environments.

Engineers increasingly are relying on advanced testing methodologies to verify signal integrity and assess the effectiveness of isolation between sensitive components. This is particularly critical for RF and analog circuits, which are highly sensitive and have stringent performance requirements across a broad spectrum of frequencies.

This surge in data rates, along with the complexity of RF transceivers for applications such as cellular communication, Wi-Fi, Bluetooth, and automotive systems, necessitates optimization of the RF signal path while minimizing interference. It also requires a combination of specialized equipment and innovative design strategies to accurately and efficiently test RF and analog components.

RF production testing demands a carefully designed test environment that includes automatic test equipment (ATE), wafer probers, and specialized test hardware like probe cards and load boards. Balancing RF signal path optimization with digital signal path, power, clock routing, and maximizing parallelism is crucial. Nevertheless, achieving this balance ensures that the testing process does not inadvertently introduce additional interference while providing meaningful data on the performance of RF and analog components.

Compartmentalizing circuits and employing advanced test techniques allows engineers to isolate high-frequency signals and validate the performance of sensitive components. Meanwhile, simulation tools offer detailed analyses of signal behavior to direct system integration before physical prototypes are built.

Testing also must account for the unique challenges posed by different frequency bands. Higher frequencies, such as those in the millimeter-wave range, introduce issues like increased signal attenuation and more pronounced transmission line effects. These factors make isolation and precise impedance matching even more critical during testing and validation.

Methodologies like time-domain reflectometry (TDR) and vector network analysis (VNA) can be used to detect anomalies in signal integrity, such as reflections, attenuation, and crosstalk. These approaches help to identify potential EMI issues that might not be apparent during the design phase, while allowing for adjustments before mass production.

In high-density integration, testing and validation are not just about ensuring individual components work correctly. They’re about verifying that the entire system performs reliably under real-world conditions. This holistic approach enables engineers to fine-tune designs, adjust shielding strategies, and optimize layouts to mitigate EMI and maintain signal integrity across all components.

Simulation: Predicting and mitigating EMI issues
In addition to traditional shielding techniques, simulation plays a crucial role in predicting and mitigating potential EMI issues before a design is finalized. While shielding is effective, it’s sometimes more efficient to address EMI issues early in the design phase rather than adding complexity or re-spinning the design later.

Simulation tools enable engineers to visualize electromagnetic fields and assess how design choices impact EMI. By modeling the interactions between components, designers can identify potential problem areas and make adjustments before fabrication.

“When it comes to EMI shielding, if the signal is designed to go where it is needed then it will not be radiating,” says Heidi Barnes, senior applications engineer at Keysight Technologies. “Radiated energy is lost energy unless it is an antenna. Simulation helps to mitigate the problem at the source. That said, it may be cheaper to add shielding rather than re-spinning a design or increasing complexity to fix the problem at the source.”

Conclusion
Effective electromagnetic interference management in high-density integration is a complex challenge that spans design, manufacturing, and testing. As devices become smaller and operating frequencies escalate into the gigahertz range and beyond, systems become increasingly susceptible to EMI. Addressing these challenges necessitates a holistic approach that includes on-chip isolation, advanced shielding techniques, judicious component placement, innovative materials, and rigorous testing, all of which need to start early in the design phase.

Looking ahead, EMI shielding challenges are expected to intensify with the continued miniaturization of systems, the introduction of new materials like glass substrates and photonic components, as well as the push toward higher frequencies such as millimeter-wave and terahertz bands. Future solutions will need to address issues like managing thermal-EMI interactions, integrating emerging materials, and adhering to stricter regulatory standards. The integration of optical interconnects and photonic circuits also will require novel EMI management techniques to handle both optical and electrical signal isolation within the same package.

Further Reading
Integration Hurdles For Analog And RF In Next-Gen Packages
Strategies and advancements for thermal dissipation, shielding, and testing schemes.
Big Shifts In Power Electronics Packaging
Packages are becoming more complex to endure high power, high temperature conditions across a variety of applications.