Constraint-Based Verification Of Clock Domain Crossings


There are many measures of the ever-growing size and complexity of semiconductor devices: die area, transistor count, gate count, size of memories, amount of parallel processing and more. All these factors mean more time spent in design, but they also have a major impact on verification. Since virtually all industry studies show verification time and effort growing faster than design, this impa... » read more

Blog Review: March 25


Rambus' Steven Woo checks out common memory systems that are used in the highest performance AI applications and points to the differences between on-chip memory, HBM, and GDDR. Mentor's Colin Walls considers whether software for embedded systems should be delivered as a binary library or source code and warns of some key potential issues when requesting source code. A Synopsys writer poi... » read more

Building A Safety Verification Flow


Sal Alvarez, senior manager of application engineering at Synopsys, explains how safety verification differs from functional verification, what changes with failure mode effects analysis, and how to determine and verify the effectiveness of safety features. » read more

Week In Review: Design, Low Power


Silicon Labs will acquire Redpine Signals' Wi-Fi and Bluetooth business, development center in Hyderabad, India, and extensive patent portfolio for $308 million in cash. Silicon Labs says the acquisition will expand the company's IoT wireless technology, including smart phone and industrial IoT, and accelerate its roadmap for Wi-Fi 6. The deal is expected to close in the second quarter of 2020.... » read more

Week In Review: Auto, Security, Pervasive Computing


National Instruments is offering free online training courses to anyone anywhere, until the end of April to help support the engineering community during COVID-19 crisis. Some instructor-led virtual training is available at reduced cost. NIWeek has been postponed this year until August 3-5, 2020. Click here for more news about how the semiconductor industry is handling COVID-19. AI, machi... » read more

Blog Review: March 18


Arm's Divya Prasad investigates whether power rails that are buried below the BEOL metal stack and back-side power delivery can help alleviate some of the major physical design challenges facing 3nm nodes and beyond. Rambus' Steven Woo takes a look at a Roofline model for analyzing machine learning applications that illustrates how AI applications perform on Google’s tensor processing unit... » read more

Designing Resilient Electronics


Electronic systems in automobiles, airplanes and other industrial applications are becoming increasingly sophisticated and complex, required to perform an expanding list of functions while also becoming smaller and lighter. As a result, pressure is growing to design extremely high-performance chips with lower energy consumption and less sensitivity to harsh environmental conditions. If this ... » read more

Timing Closure At 7/5nm


Mansour Amirfathi, director of application engineering at Synopsys, examines how to determine if assumptions about design are correct, how many cycles are needed for a particular operation and why this is so complicated, and what happens if signals get out of phase. » read more

HBM Issues In AI Systems


All systems face limitations, and as one limitation is removed, another is revealed that had remained hidden. It is highly likely that this game of Whac-A-Mole will play out in AI systems that employ high-bandwidth memory (HBM). Most systems are limited by memory bandwidth. Compute systems in general have maintained an increase in memory interface performance that barely matches the gains in... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys revealed DSO.ai (Design Space Optimization AI), an autonomous AI application that searches for optimization targets in very large solution spaces of chip design, inspired by the process of DeepMind's game-playing AlphaZero. DSO.ai engines ingest large data streams generated by chip design tools and use them to explore search spaces, observing how a design evolves over t... » read more

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