tag: Synopsys

A Trillion Security Risks
By Yuri Nagano - 05 Dec, 2019 - Comments: 0

An explosion in IoT devices has significantly raised the security threat level for hardware and software, and it shows no sign of abating anytime soon. Sometime over the next decade the number of connected devices is expected to hit the 1 trillion mark. Expecting all of them to be secure is impossible, particularly as the attack surface widens and the attack vectors become more sophisticated... » read more

Ensuring Functional Safety For Self-Driving Cars
By Marc Serughetti - 05 Dec, 2019 - Comments: 0

There may be no hotter topic in electronics than chips for autonomous vehicles. Self-driving cars have captured the public imagination and become a major area of investment. Both established automotive manufacturers and well-funded startups are producing vehicles with the highly complex chips needed to negotiate roads, deal with unpredictable humans and communicate with the cloud for machine le... » read more

Accelerating ISO 26262 Compliance For Semiconductor Projects
By Synopsys - 04 Dec, 2019 - Comments: 0

In recent years, autonomous driving vehicles have become one of the hottest topics in the automotive world. Everyday consumers and electronics professionals are both fascinated by the promise and the risks of autonomous vehicles. Existing automotive semiconductor companies as well as new entrants are making significant investments in this area developing new high performance, feature rich and p... » read more

Distributed Design Implementation
By Ed Sperling - 04 Dec, 2019 - Comments: 0

PV Srinivas, group director for R&D at Synopsys, talks about the impact of larger chips and increasing complexity on design productivity, why divide-and-conquer doesn’t work so well anymore, and how to reduce the number of blocks that need to be considered to achieve faster timing closure and quicker time to market. » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2019 - Comments: 0

Arm's Rupal Gandhi digs into the Cell-Aware Test methodology to deterministically target the growing number of defects that occur within the cells, the process of CAT library generation, and compares the static and transition patterns generated. Cadence's Paul McLellan shares highlights from the recent WOSET event with a look at the big drivers for the current interest in open-source EDA too... » read more

Using FPGAs For AI
By Brian Bailey - 02 Dec, 2019 - Comments: 3

Artificial intelligence (AI) and machine learning (ML) are progressing at a rate that is outstripping Moore's Law. In fact, they now are evolving faster than silicon can be designed. The industry is looking at all possibilities to provide devices that have the necessary accuracy and performance, as well as a power budget that can be sustained. FPGAs are promising, but they also have some sig... » read more

Blog Review: Nov. 27
By Jesse Allen - 27 Nov, 2019 - Comments: 0

Arm's Ben Fletcher digs into what's needed to make wireless 3D integration a reality from a tool to automate the design and optimization process for inductors used in wireless 3D-ICs to exploring how the data can be encoded in the transceiver to reduce power consumption. Cadence's Paul McLellan listens in as Eli Singerman of Intel explains the importance of platform security and why firmware... » read more

Static Verification Of Low Power Designs
By Himanshu Bhatt - 26 Nov, 2019 - Comments: 0

Are there any chips designed today that don’t have limitations on their power consumption? For smartphones and tablets, increasing the time between charges is a clear product differentiator and a frequent design goal. Power consumption is also an issue for Internet-of-Things (IoT) devices, many of which are in inaccessible locations where battery replacement or recharge is difficult. Even com... » read more

Transforming Silicon Bring-Up
By Brian Bailey - 26 Nov, 2019 - Comments: 0

Not too long ago, the return of first silicon from the foundry was a nail-biting moment as power was applied to the chip. Today, better verification methodologies, increased use of emulation, and more mature fabrication practices have transformed how teams utilize first silicon. It is about to be transformed again, and there are some interesting possibilities on the horizon. Much of what use... » read more

Thoroughly Verifying Complex SoCs
By Ann Mutschler - 26 Nov, 2019 - Comments: 0

The number of things that can go wrong in complex SoCs targeted at leading-edge applications is staggering, and there is no indication that verifying these chips will function as expected is going to get any easier. Heterogeneous designs developed for leading-edge applications, such as 5G, IoT, automotive and AI, are now complex systems in their own right. But they also need to work in conju... » read more

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