tag: 2.5D

Extending The IC Roadmap
By Mark LaPedus - 11 Jun, 2018 - Comments: 0

An Steegen, executive vice president of semiconductor technology and systems at Imec, sat down with Semiconductor Engineering to discuss IC scaling and chip packaging. Imec is working on next-generation transistors, but it is also developing several new technologies for IC packaging, such as a proprietary silicon bridge, a cooling technology and packaging modules. What follows are excerpts of t... » read more

Analog Migration Equals Redesign
By Ann Mutschler - 24 May, 2018 - Comments: 1

Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

Tech Talk: HBM vs. GDDR6
By Ed Sperling - 10 May, 2018 - Comments: 0

Frank Ferro, senior director of product management at Rambus, talks about memory bottlenecks and why both GDDR6 and high-bandwidth memory are gaining steam and for which markets. https://youtu.be/CPqdZZooS2g     Related Video GDDR6 – HBM2 Tradeoffs (2019) What type of DRAM works best where. » read more

The Case For Chiplets
By Ed Sperling - 07 May, 2018 - Comments: 4

Discussion about chiplets is growing as the cost of developing chips at 10/7nm and beyond passes well beyond the capabilities of many chipmakers. Estimates for developing 5nm chips (the equivalent 3nm for TSMC and Samsung) are well into the hundreds of millions of dollars just for the NRE costs alone. Masks costs will be in the double-digit millions of dollars even with EUV. And that's assum... » read more

Challenges At The Edge
By Kevin Fogarty - 03 May, 2018 - Comments: 0

By Kevin Fogarty and Ed Sperling Edge computing is inching toward the mainstream as the tech industry begins grappling with the fact that far too much data will be generated by sensors to send everything back to the cloud for processing. The initial idea behind the IoT/IIoT, as well as other connected devices, was that simple sensors would relay raw data to the cloud for processing throug... » read more

High-Performance Memory Challenges
By Ann Mutschler - 12 Apr, 2018 - Comments: 1

Designing memories for high-performance applications is becoming far more complex at 7/5nm. There are more factors to consider, more bottlenecks to contend with, and more tradeoffs required to solve them. One of the biggest challenges is the sheer volume of data that needs to be processed for AI, machine learning or deep learning, or even in classic data center server racks. “The design... » read more

The Race To Mass Customization
By Ed Sperling - 09 Apr, 2018 - Comments: 0

The number of advanced packaging options continues to rise. The choices now include different materials for interposers, at least a half-dozen fan-outs, not to mention hybrid fan-out/3D stacking, system-in-package, flip-chip and die-to-die bridges. There are several reasons for all of this activity. First, advanced packaging offers big improvements in performance and power that cannot be ac... » read more

Choosing The Right Interconnect
By Ed Sperling - 09 Apr, 2018 - Comments: 3

Efforts to zero in on cheaper advanced packaging approaches that can speed time to market are being sidetracked by a dizzying number of choices. At the center of this frenzy of activity is the [getkc id="36" kc_name="interconnect"]. Current options range from organic, silicon and glass interposers, to bridges that span different die at multiple levels. There also are various fan-out approach... » read more

Embedded Die Packaging Emerges
By Mark LaPedus - 09 Apr, 2018 - Comments: 1

Embedded die packaging is seeing renewed demand amid the push towards chips and systems that require smaller form factors. ASE, AT&S, GE, Shinko, Taiyo Yuden, TDK, Würth Elektronik and others compete in the merchant embedded die packaging market, according to Yole Développement. In fact, ASE and TDK have a joint venture in the arena, which is beginning to ramp up production. Additional... » read more

How To Choose The Right Memory
By Ann Mutschler - 02 Apr, 2018 - Comments: 0

When it comes to designing memory, there is no such thing as one size fits all. And given the long list of memory types and usage scenarios, system architects must be absolutely clear on the system requirements for their application. A first decision is whether or not to put the memory on the logic die as part of the SoC, or keep it as off-chip memory. "The tradeoff between latency and th... » read more

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