tag: 28nm

Get Agile
By Randy Smith - 28 May, 2015 - Comments: 0

History repeats itself, but frequently not in the exactly the same place. The problems faced by system engineering teams today—rising complexity, shorter market windows and more issues involving interactions that affect everything from dynamic power and leakage current to electromigration and finFET design—mirror the kinds of top-down issues that software developers began encountering more ... » read more

Design Virtualization And Its Impact On SoC Design
By eSilicon - 27 May, 2015 - Comments: 0

At advanced technology nodes (40nm and below), the number of options that a system-on-chip (SoC) designer faces is exploding. Choosing the correct combination of these options can have a dramatic impact on the quality, performance, cost and schedule of the final SoC. Using conventional design methodologies, it is very difficult to know if the correct options have been chosen. There is simply ... » read more

How Hard Is FD-SOI Design?
By Ann Mutschler - 21 May, 2015 - Comments: 0

Fully-depleted silicon-on-insulator ([getkc id="220" kc_name="FD-SOI"]) manufacturing technology reached of point of readiness for mass production at the end of March. Along with that, it’s now clear that while there are some impacts on the design flow, those impacts are not game changers. For one thing, the tools required are the same ones currently used for 28nm planar bulk CMOS. The onl... » read more

One-On-One: Thomas Caulfield
By Mark LaPedus - 21 May, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about fabs, process technology and the equipment industry with Thomas Caulfield, senior vice president and general manager of Fab 8 at [getentity id="22819" comment="GlobalFoundries"]. Located in Saratoga County, N.Y., Fab 8 is GlobalFoundries’ most advanced 300mm wafer fab. What follows are excerpts of that discussion. SE: Last year, GlobalFoundr... » read more

Rethinking Power
By Ed Sperling - 14 May, 2015 - Comments: 0

Power typically has been the last factor to be considered in the PPA equation, and it usually was somebody else's problem. Increasingly it's everyone's problem, and EDA companies are beginning to look at power differently than in the past. While the driving forces vary by market and by process node, the need to save energy at every node and in almost all designs is pervasive. In the server m... » read more

FD-SOI Vs. FinFETs
By Ed Sperling - 13 May, 2015 - Comments: 3

Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

TSMC Tech Tour De Force
By Barry Pangrle - 13 Apr, 2015 - Comments: 0

TSMC held the first of its three North American Tech Symposiums on April 7 in San Jose, with the other two coming up in Boston on April 14 and in Austin on April 16. As was mentioned previously here, the record fast ramp-time of the 20nm node was highlighted among other technological achievements. TSMC also released its March revenue report on April 10, and it shows a dramatic 49.8% increase in... » read more

TSMC: Rise of the “Phantom Node”
By Barry Pangrle - 23 Mar, 2015 - Comments: 0

TSMC’s financial results for Q4 of 2014 and for the full year were announced in January with TSMC stating it again had achieved record sales and profits. The fourth quarter saw TSMC set records for revenue, earnings per share and cash balance. TSMC made bold predictions last year about 20nm revenue by Q4 2014, and it appears it has met them (see 28nm Powers TSMC Forward, Part Deux). TSMC repo... » read more

Manufacturing And Packaging Changes For 2015
By Brian Bailey - 22 Jan, 2015 - Comments: 0

This year more than 26 people provided predictions for 2015. Most of these came from the EDA industry, so the results may be rather biased. However, ecosystems are coming closer together in many parts of the semiconductor food chain, meaning that the EDA companies often can see what is happening in dependent industries and in the system design houses. Thus their predictions may have already res... » read more

Tech Talk: Set-Top Power
By Ed Sperling - 19 Jan, 2015 - Comments: 0

Broadcom's John Redmond, associate technical director for digital video technology, talks with Semiconductor Engineering about what the next-generation set-top boxes will look like and how they will save power. The video was shot at Cadence's Low Power Summit. [youtube vid=Ov2GFrUTzts] » read more

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