EDA Vendors Prepare For 7nm


It’s not too early to begin looking at design tools for the 7nm, even though the node is not expected to be production-ready until later this decade. While still in the early stages, foundries already in development with leading EDA companies, even though the water remains murky at this point. “7nm right now is in early definition, so we don't know exactly what it will be,” observed... » read more

Survey: Optimism Up For Multi-beam


The eBeam Initiative announced the completion of its third annual survey. In one of the highlights of the survey, a majority (58%) of respondents predict that multi-beam technology will be used in production by 2016 to address the critical problem of mask write times as the industry moves to smaller geometries. And according to the survey, skepticism of EUV lithography also increased comp... » read more

More Problems Ahead


Semiconductor Engineering sat down to discuss future scaling problems with Lars Liebmann, a fellow at IBM; Adam Brand, managing director of transistor technology at Applied Materials; Karim Arabi, vice president of engineering at Qualcomm; and Srinivas Banna, a fellow for advanced technology architecture at GlobalFoundries. SE: Where are the most severe issues these days? Is it on the design... » read more

What Happened To Next-Gen Lithography?


Chipmakers continue to march down the process technology curve. Using today’s optical lithography and multiple patterning, the semiconductor industry is scaling its leading-edge devices far beyond what was once considered possible. The question is how far can the industry extend 193nm immersion [getkc id="80" comment="lithography"] and multiple patterning before these technologies become t... » read more

More Problems Ahead


Semiconductor Engineering sat down to discuss future scaling problems with Lars Liebmann, a fellow at IBM; Adam Brand, managing director of transistor technology at Applied Materials; Karim Arabi, vice president of engineering at Qualcomm; and Srinivas Banna, a fellow for advanced technology architecture at GlobalFoundries. SE: There seems to be some debate in this group about whether we’r... » read more

DSA: Hype Or Revolution?


Directed self-assembly (DSA) has become the subject of a great deal of research attention in the lithography world, to the point where there were dedicated sessions at this year’s Advanced Lithography conference in February. So is this just another passing research fad, or is it a technology that will revolutionize semiconductor manufacturing? DSA utilizes a block copolymer that effectivel... » read more

More Problems Ahead


Semiconductor Engineering sat down to discuss future scaling problems with Lars Liebmann, a fellow at IBM; Adam Brand, managing director of transistor technology at Applied Materials; Karim Arabi, vice president of engineering at Qualcomm; and Srinivas Banna, a fellow for advanced technology architecture at GlobalFoundries. SE: We’re starting to hear talk about octuple patterning. We’ve ... » read more

Why The Next Couple Process Nodes Are So Critical


In the greater scheme of things, one process node doesn't matter all that much. In fact, it has become common practice for big chipmakers to skip nodes for some of their chips as power issues becoming increasingly complex, time-to-market windows shrink and leapfrogging is viewed as a way to maximize resources while remaining über-competitive. But the next process node, and certainly the nex... » read more

More People Use Phones Than Toothbrushes…


“Business Has Only Two Functions – Marketing and Innovation” — Milan Kundera There may be more to running a successful business than marketing and innovation, but these two functions were front-and-center at SEMICON West 2014. This year’s industry gathering was an important, and positive, step forward together. Because of the gravity of the challenges facing our industry – funda... » read more

EUV Is Key To 450mm Wafers


Whether the wafers in question are 200 mm in diameter, or 300 mm, or potentially 450 mm, larger wafer sizes have always been justified by manufacturing economics. If the cost to process a wafer stays the same, but the wafer contains more devices, then the cost per device goes down. For processes that apply to the entire wafer at once — etch, deposition, cleaning, and so forth — the equation... » read more

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