Using Process Modeling To Enhance Device Uniformity During Self-Aligned Quadruple Patterning

By Timothy Yang - 18 Nov, 2021 - Comments: 0

Despite the growing interest in EUV lithography, self-aligned quadruple patterning (SAQP) still holds many technical advantages in pattern consistency, simplicity, and cost. This is particularly true for very simple and periodic patterns, such as line & space patterns or hole arrays. The biggest challenge of SAQP is the inherently asymmetric mask shape. This asymmetry can create structural ... » read more

Intelligent Agents for the Optimization of Atomic Layer Deposition

By Technical Paper Link - 05 Aug, 2021 - Comments: 0

"Atomic layer deposition (ALD) is a highly controllable thin film synthesis approach with applications in computing, energy, and separations. The flexibility of ALD means that it can access a massive chemical catalogue; however, this chemical and process diversity results in significant challenges in determining processing parameters that result in stable and uniform film growth with minimal pr... » read more

Thinner Channels With 2D Semiconductors

By Katherine Derbyshire - 21 Jun, 2021 - Comments: 0

Moving to future nodes will require more than just smaller features. At 3/2nm and beyond, new materials are likely to be added, but which ones and exactly when will depend upon an explosion of material science research underway at universities and companies around the globe. With field-effect transistors, a voltage applied to the gate creates an electric field in the channel, bending the ban... » read more

ALD Coatings For Critical Chamber Components

By Serena Brischetto - 18 Mar, 2021 - Comments: 0

With each transition to a new technology node, fab requirements for metal and particle contamination become more stringent, posing challenges for existing coating methods such as anodization or plasma spray that may not provide complete protection against contamination especially on critical chamber components with complex geometry. SEMI spoke with Beneq business executive Sami Sneck about... » read more

Novel Etch Technologies Utilizing Atomic Layer Process For Advanced Patterning

By TEL - 17 Dec, 2020 - Comments: 0

We demonstrated a high selective and anisotropic plasma etch of Si3N4 and SiC. The demonstrated process consists of a sequence of ion modification and chemical dry removal steps. The Si3N4 etch with H ion modification showed a high selectivity to SiO2 and SiC films. In addition, we have developed selective etch of SiC with N ion modification. On the other hand, in the patterning etch processes,... » read more

Advanced Materials For High-Temperature Process Integration

By James Lamb - 16 Jul, 2020 - Comments: 0

From the last several lithography nodes, in the 14 to 10nm range, to the latest nodes, in the 7 to 5nm range, the requirements for patterning and image transfer materials have increased dramatically. One of the key pinch points is the tradeoff between planarization and the high-temperature stability required from carbon films used in patterning and post-patterning process integration. Patter... » read more

Manufacturing Bits: Feb. 18

By Mark LaPedus - 18 Feb, 2020 - Comments: 0

Molecular layer etch The U.S. Department of Energy’s Argonne National Laboratory has made new advances in the field of molecular layer etching or etch (MLE). MLE is related to atomic layer etch (ALE). Used in the semiconductor industry, ALE selectively removes targeted materials at the atomic scale without damaging other parts of the structure. ALE is related to atomic layer deposition... » read more

A Ferroelectric Semiconductor Field-Effect Transistor

By Technical Paper Link - 31 Dec, 2019 - Comments: 0

Abstract: "Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are potentially of use in non-volatile memory technology, but they suffer from short retention times, which limits their wider application. Here, we report a ferroelectric sem... » read more

ALD Tungsten Solves Capacity Challenges in 3D NAND Device Manufacturing

By Lam Research - 18 Apr, 2019 - Comments: 0

Our increasingly connected and ever “smarter” world generates increasing amounts of data, putting pressure on manufacturers who face new technical challenges in delivering the increasing capacity required for processing and storage. The ALD Tungsten process is helping 3D NAND manufacturers overcome the technical challenges of producing memory chips with higher storage capacity. 3D NAND a... » read more

Vapor-Deposited Octadecanethiol Masking Layer on Copper for Selective Hf3N4 ALD

By Veeco - 14 Jan, 2019 - Comments: 0

Full title: Vapor-deposited octadecanethiol masking layer on copper to enable area selective Hf3N4 atomic layer deposition on dielectrics studied by in situ spectroscopic ellipsometry Journal of Vacuum Science & Technology A 36, 031605 (2018); Authors: Laurent Lecordiera, Veeco Instruments Sebastiaan Herregods and Silvia Armini, IMEC Area-selective atomic layer deposition (AS-ALD) h... » read more

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Knowledge Centers
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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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by Laura Peters

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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tag: atomic layer deposition