tag: Coventor

Week In Review: Manufacturing, Test
By Mark LaPedus - 06 Aug, 2021 - Comments: 0

Chipmakers Taiwan’s Foxconn continues to expand its efforts in the semiconductor business. Foxconn has acquired a 6-inch wafer fab and the equipment from Taiwan’s Macronix for NT$2.52 billion (US$90.76 million). With the fab, Foxconn plans to enter the wideband gap semiconductor market, namely silicon carbide (SiC). SiC devices are used in electric vehicles, a market that Foxconn is making... » read more

Using A Virtual DOE To Predict Process Windows And Device Performance Of Advanced FinFET Technology
By Qingpeng Wang - 03 Aug, 2021 - Comments: 0

By Qingpeng Wang, Yu De Chen, Cheng Li, Rui Bao, Jacky Huang, and Joseph Ervin Introduction With continuing finFET device process scaling, micro loading control becomes increasingly important due to its significant impact on yield and device performance [1-2]. Micro-loading occurs when the local etch rate on a wafer is dependent upon existing feature sizes and local pattern density. Uninten... » read more

MEMS: New Materials, Markets And Packaging
By Ed Sperling - 28 Jul, 2021 - Comments: 1

Semiconductor Engineering sat down to talk about future developments and challenges for microelectromechanical systems (MEMS) with Gerold Schropfer, director of MEMS products and European operations in Lam Research's Computational Products group, and Michelle Bourke, senior director of strategic marketing for Lam's Customer Support Business Group. What follows are excerpts of that conversation.... » read more

Blog Review: July 28
By Jesse Allen - 28 Jul, 2021 - Comments: 0

Synopsys' Chris Clark considers potential vulnerabilities in automotive over-the-air updates and best practices and new standards the industry can implement to improve security of vehicle software updates. Cadence's Paul McLellan gets a look at expected new fab construction in the coming years and where capacity is being focused. Siemens' Robin Bornoff dives into electromagnetic simulatio... » read more

The Effects Of Poly Corner Etch Residue On Advanced FinFET Device Performance
By Coventor - 21 Jul, 2021 - Comments: 0

In this paper, we study the effect of poly corner residue during a 5nm FinFET poly etch process using virtual fabrication. A systemic investigation was performed to understand the impact of poly corner residue on hard failure modes and device performance. Our results indicate that larger width and height residues can lead to a hard failure by creating a short between the source/drain epitaxy an... » read more

Blog Review: June 30
By Jesse Allen - 30 Jun, 2021 - Comments: 0

Siemens EDA's Chris Spear considers what classes should represent in SystemVerilog and offers two major categories along with some helpful UVM tips. Cadence's Paul McLellan listens in on keynotes at the recent TSMC Technology Symposium, including TSMC CEO C. C. Wei's introduction some of the fab's new offerings, such as an automotive-focused N5 process. Synopsys' Dennis Kengo Oka notes th... » read more

Blog Review: June 23
By Jesse Allen - 23 Jun, 2021 - Comments: 0

Synopsys' Manuel Mota shows how splitting SoCs into smaller dies for advanced packaging and using die-to-die interfaces to enable high bandwidth, low latency, and low power connectivity can benefit hyperscale data centers. Siemens EDA's Chris Spear explains the relationship between classes and objects in SystemVerilog with a handy visualization and notes the difference between SystemVerilog ... » read more

Fan-Out Packaging Options Grow
By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Using Virtual Process Libraries To Improve Semiconductor Manufacturing
By Jeonghoon (James) Kim - 17 Jun, 2021 - Comments: 0

People think that semiconductor process simulation libraries should be developed using a perfect theoretical background that is strongly supported by empirical data. This might be true in academic research, where researchers are trying to develop a systematic approach to understanding a process mechanism. However, it is definitely not true in production fabs, where engineers need to quickly a... » read more

Process Model Calibration: The Key To Building Predictive And Accurate 3D Process Models
By Coventor - 16 Jun, 2021 - Comments: 0

The semiconductor industry has always faced challenges caused by device scaling, architecture evolution, and process complexity and integration. These challenges are coupled with a need to provide new technology to the market quickly. In the initial stages of semiconductor technology development, innovative process flow schemes must be tested using silicon test wafers. These wafer tests are len... » read more

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