Making Chips At 3nm And Beyond

By Mark LaPedus and Ed Sperling - 16 Apr, 2020 - Comments: 4

Select foundries are beginning to ramp up their new 5nm processes with 3nm in R&D. The big question is what comes after that. Work is well underway for the 2nm node and beyond, but there are numerous challenges as well as some uncertainty on the horizon. There already are signs that the foundries have pushed out their 3nm production schedules by a few months due to various technical issu... » read more

Inspecting, Patterning EUV Masks

By Mark LaPedus - 06 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Thomas Scheruebl, director of strategic business development and product strategy at Zeiss; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What fol... » read more

Intra-Field Stress Impact on Global Wafer Deformation

By Veeco - 14 Aug, 2019 - Comments: 0

One of the contributors to layer-to-layer overlay in today’s chip manufacturing process is wafer distortion due to thin film deposition. Mismatch in the film specific material parameters (e.g., thermal expansion coefficients) may result in process-induced warpage of the wafers at room temperature. When these warped wafers are loaded onto the scanner for the next layer exposure, in-plane disto... » read more

200mm Cools Off, But Not For Long

By Mark LaPedus - 18 Jul, 2019 - Comments: 4

After years of acute shortages, 200mm fab capacity is finally loosening up, but the supply/demand picture could soon change with several challenges on the horizon. 200mm fabs are older facilities with more mature processes, although they still churn out a multitude of today’s critical chips, such as analog, MEMS, RF and others. From 2016 to 2018, booming demand for these and other chips ca... » read more

Advanced Process Control

By Ed Sperling - 20 Jun, 2019 - Comments: 0

David Fried, vice president of computational products at Lam Research, looks at shrinking tolerances at advanced processes, how that affects variation in semiconductor manufacturing, and what can be done to achieve the benefits of scaling without moving to new transistor architectures. » read more

Single Vs. Multi-Patterning EUV

By Mark LaPedus - 25 Mar, 2019 - Comments: 5

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

Unsticking Moore’s Law

By Ed Sperling - 04 Feb, 2019 - Comments: 2

Sanjay Natarajan, corporate vice president at Applied Materials with responsibility for transistor, interconnect and memory solutions, sat down with Semiconductor Engineering to talk about variation, Moore's Law, the impact of new materials such as cobalt, and different memory architectures and approaches. What follows are excerpts of that conversation. SE: Reliability is becoming more of an... » read more

3D NAND Flash Wars Begin

By Mark LaPedus - 20 Aug, 2018 - Comments: 0

3D NAND suppliers are gearing up for a new battle amid a period of price and competitive pressures, racing each other to the next technology generations. Competition is intensifying as a new player enters the 3D NAND market—China’s Yangtze Memory Technologies Co. (YMTC). Backed by billions of dollars in funding from the Chinese government, YMTC recently introduced its first 3D NAND techn... » read more

Where Is Selective Deposition?

By Mark LaPedus - 25 Jun, 2018 - Comments: 4

For years, the industry has been working on an advanced technology called area-selective deposition for chip production at 5nm and beyond. Area-selective deposition, an advanced self-aligned patterning technique, is still in R&D amid a slew of challenges with the technology. But the more advanced forms of technology are beginning to make some progress, possibly inching closer from the la... » read more

RF SOI Wars Begin

By Mark LaPedus - 17 May, 2018 - Comments: 2

Several foundries are expanding their fab capacities for RF SOI processes amid huge demand and shortages of this technology for smartphones. A number of foundries are increasing their 200mm RF SOI fab capacities to meet soaring demand. Then, GlobalFoundries, TowerJazz, TSMC and UMC are expanding or bringing up RF SOI processes in 300mm fabs in an apparent race to garner the first wave of RF ... » read more

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