tag: ETH Zurich

Technical Paper Round-Up: Aug 23
By Linda Christensen - 23 Aug, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=46 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Polynesia, A Novel Hardware/Software Cooperative Design for In-Memory HTAP Databases
By Technical Paper Link - 22 Aug, 2022 - Comments: 0

A team of researchers from ETH Zurich, Google and Univ. of Illinois Urbana-Champaign recently published a technical paper titled "Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design". Abstract (partial) "We propose Polynesia, a hardware–software co-designed system for in-memory HTAP [hybrid transactional/anal... » read more

Technical Paper Round-up: August 8
By Linda Christensen - 08 Aug, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=44 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Low Power HW Accelerator for FP16 Matrix Multiplications For Tight Integration Within RISC-V Cores
By Technical Paper Link - 03 Aug, 2022 - Comments: 0

This new technical paper titled "RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs" was published by researchers at University of Bologna and ETH Zurich. According to their abstract: "One of the key stumbling stones is the need for parallel floating-point operations, which are considered unaffordable on sub-100 mW extre... » read more

Technical Paper Round-Up: July 26
By Linda Christensen - 26 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=41 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Week in Review: Design, Low Power
By Marie C. Baca - 22 Jul, 2022 - Comments: 0

Acquisitions Renesas completed its acquisition of Reality Analytics, which specializes in embedded AI and TinyML solutions for advanced non-visual sensing in automotive, industrial and commercial products. Siemens Digital Industries Software will acquire Zona Technology, which develops aerospace simulation software. Siemens plans to integrate that software into its wXcelerator and Simcenter... » read more

Reduce RowHammer Vulnerability By Reducing Wordline Voltage
By Technical Paper Link - 18 Jul, 2022 - Comments: 0

Researchers from ETH Zurich present a new technical paper titled "Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices." Abstract (Partial) "This is the first work to experimentally demonstrate on 272 real DRAM chips that lowering VPP reduces a DRAM chip's RowHammer vulnerability. We show that lowering VPP 1) increases the number of activat... » read more

Technical Paper Round-Up: July 18
By Linda Christensen - 18 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=33 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit fo... » read more

DRAM Chips That Employ On-Die Error Correction & Related Reliability Techniques
By Technical Paper Link - 16 Jul, 2022 - Comments: 0

This new PhD thesis paper titled "Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes" from ETH Zurich researcher Minesh Patel won the IEEE  William C. Carter Award in June 2022. Abstract "Improvements in main memory storage density are primarily driven by process technology scaling, which negatively impacts reliability by exacerbating various circu... » read more

RETBLEED: New Spectre-BTI Attack (ETH Zurich)
By Technical Paper Link - 13 Jul, 2022 - Comments: 0

New Spectre-BTI attack that "leaks arbitrary kernel memory." It's detailed in this research paper titled “RETBLEED: Arbitrary Speculative Code Execution with Return Instructions” from researchers at ETH Zürich. Mitigations are available. Abstract "Modern operating systems rely on software defenses against hardware attacks. These defenses are, however, as good as the assumptions they m... » read more

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