tag: heterogeneous integration

Tech Talk: EM Crosstalk
By Ed Sperling - 14 Dec, 2017 - Comments: 0

Anand Raman, senior director at Helic, talks about the impact of electromagnetic interference on digital design at 10/7nm and beyond. Once confined to the analog space, noise is suddenly an issue at advanced nodes for all designs. At the root of the problem are smaller nodes, increased speed and higher levels of integration. https://youtu.be/hzZqK2lNJNQ » read more

Getting Power Management Right
By Ann Mutschler - 14 Nov, 2017 - Comments: 0

Getting power management right in the era of heterogeneous SoCs is a multi-pronged effort, there's no getting around it. Engineering teams daily try to squeeze more and more power from their designs, which many times includes adding human resources and expertise to the project. Take an example where a design team leader gets the mandate to include high level synthesis in the design metho... » read more

DARPA CHIPS Program Pushes For Chiplets
By Ann Mutschler - 14 Sep, 2017 - Comments: 0

While the semiconductor industry plugs away at More Than Moore innovation, the U.S. government is guiding its own SoC development. A new program kicked off last year called ‘Common Heterogeneous Integration and IP Reuse Strategies’ or CHIPS to take its own approach the incredibly high cost of SoC design and manufacturing. DARPA said it recognizes that the explosive growth in mobile and t... » read more

Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy