tag: high performance

Foveated Rendering
By Arm - 12 Sep, 2018 - Comments: 0

Virtual Reality (VR) is becoming increasingly popular due to its ability to immerse the user into an experience. Those experiences can vary from watching a movie in a simulated theatre, having a look at your personal pictures as though they were paintings in a museum or finding yourself in front row seats of a huge sporting event. These specific experiences don’t stress the device hardware to... » read more

More Performance At The Edge
By Ed Sperling - 09 Aug, 2018 - Comments: 0

Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

Customizing Power And Performance
By Ed Sperling - 08 Feb, 2018 - Comments: 0

Designing chips is getting more difficult, and not just for the obvious technical reasons. The bigger issue revolves around what these chips going to be used for-and how will they be used, both by the end user and in the context of other electronics. This was a pretty simple decision when hardware was developed somewhat independently of software, such as in the PC era. Technology generally d... » read more

Automated Body Bias Validation For High Performance, Low Power Electronics
By Mentor, a Siemens Business - 11 Oct, 2017 - Comments: 0

Using a device’s body bias effect allows designers to tune a circuit’s behavior to meet both power and performance specifications, but getting it right isn’t always easy. Accurate, fast, automated body bias verification is critical to ensure today’s complex designs meet demanding performance, reliability, and power usage specifications. To read more, click here. » read more

Low Power Trends Toward FinFET
By Mary Ann White - 12 Feb, 2015 - Comments: 0

My previous blog, Power Reduction Techniques, covered which low power techniques were applicable for various process nodes, from larger planar CMOS process technologies through finFET. The 16 and 14nm finFET-based process nodes are moving into production this year, and we are seeing many companies rapidly move their designs to finFET. In my last post, I noted some of the reasons why finFET is s... » read more

Implementation Challenges And Solutions Of Low-Power, High-Performance Memory Systems
By Rambus - 10 Sep, 2014 - Comments: 0

Mobile devices and their demand for rapid innovation have fundamentally and forever changed the semiconductor industry. These devices have fueled tremendous innovation in the last few years to bring about drastic improvements in performance, power and cost efficiency. They also demand condensed product development cycles which accelerate the rate and need for innovation. The only thing that has... » read more

Choosing The Right Systems Design Path
By Brian Fuller - 13 Feb, 2014 - Comments: 0

I’m a cheap bastard, usually given to self-abnegation when it comes to buying material goods for myself. But I broke down and bought a runner’s watch late last year because I wanted to change up my exercise routine to run the same distances, only faster. I quickly decided against going all in and getting a GPS watch. At this point in the arc of electronics-design technology, it’s hard ... » read more

Performance Or Power?
By Ed Sperling - 06 Sep, 2013 - Comments: 0

For high-volume chips, such as those slated for mobile devices such as tablets or smart phones, energy efficiency is absolutely critical. For very high-value chips, which are the ones that show up in PCs or servers, the focus is more on performance and how efficiently that performance is obtained. And for the stuff in the middle, notably the Internet of things, the commodity servers and automot... » read more

Experts At The Table: Who Pays For Low Power?
By Ed Sperling - 19 Jul, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the cost of low power with Fadi Gebara, research staff member for IBM’s Austin Research Lab; David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Aveek Sarkar, vice president of product engineering and support at Apache Design; and Tim Whitfield, director o... » read more

Bit Mapping
By Ed Sperling - 22 Feb, 2013 - Comments: 0

The rule of thumb for semiconductor manufacturing is that big breakthroughs tend to last a decade, or about five process nodes. While the transistor already has spanned more than five decades and the IC more than four decades, the technology used to create them typically only lasts about one. 193nm lithography has been around more than a decade. Bets were being made publicly back at 45nm—o... » read more

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