tag: IEEE

Problems And Solutions In Analog Design
By Ann Mutschler - 05 Aug, 2020 - Comments: 1

Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

Open-Source Verification
By Brian Bailey - 30 Jul, 2020 - Comments: 1

Ask different people what open-source verification means and you will get a host of different answers. They range from the verification of open-source hardware, to providing an open-source verification infrastructure, to providing open-source stream generators or reference models, to open-source simulators and formal verification engines. Verification is about reducing risk. "Verification is... » read more

What’s After 5G
By Bryon Moyer - 20 Jul, 2020 - Comments: 1

This year’s IEEE Symposia on VLSI Technology and Circuits (VLSI 2020) included a presentation by NTT Docomo that looked far into the future of cellular communications, setting the stage for a broad industry shift in communication. This is far from trivial. 5G only just recently entered the commercial world, and — especially with the higher millimeter-wave (mmWave) frequencies — it has ... » read more

Generalized Class-E Power Amplifier With Shunt Capacitance And Shunt Filter
By Various Writers - 16 Jul, 2020 - Comments: 0

This paper presents a generalized analysis of the Class-E power amplifier (PA) with a shunt capacitance and a shunt filter, leading to a revelation of a unique design flexibility that can be exploited either to extend the maximum operating frequency of the PA or to allow the use of larger active devices with higher power handling capability. The proposed PA fulfills zero voltage switching (ZVS)... » read more

Manufacturing Bits: June 30
By Mark LaPedus - 30 Jun, 2020 - Comments: 0

1μm pitch wafer bonding At the recent IEEE Electronic Components and Technology Conference (ECTC), Imec presented a paper on a fine-pitch hybrid wafer-to-wafer bonding technology for heterogeneous integration. Imec described a way to enable hybrid bond pitches down to 1μm using a novel Cu/SiCN (copper/silicon-carbon-nitrogen) surface topography. Today, the industry is developing or shi... » read more

Manufacturing Bits: June 16
By Mark LaPedus - 16 Jun, 2020 - Comments: 0

GaN power modules Gallium-nitride (GaN) devices are emerging in several markets, such as power semiconductors and RF. GaN, a binary III-V compound, is a wide-bandgap technology, meaning it is faster and more efficient than silicon-based devices. GaN has 10 times the breakdown field strength with double the electron mobility than silicon. Generally, some GaN vendors don’t use a traditio... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 05 Jun, 2020 - Comments: 0

Materials A major setback has been dealt to the United States’ efforts to develop rare earths. The U.S. is attempting to develop its own supply of rare earths, hoping to reduce its reliance on China. China controls nearly 90% of the world’s rare earths, which are used in magnets and various electronic systems. In April, the U.S. Department of Defense (DoD) awarded two U.S.-based firms, Lyn... » read more

Introducing Nanosheets Into Complementary-Field Effect Transistors (CFETs)
By Benjamin Vincent - 01 Jun, 2020 - Comments: 0

In our November 2019 blog [1], we discussed using virtual fabrication (SEMulator3D) to benchmark different process integration options for Complementary-FET (CFET) fabrication. CFET is a CMOS architecture that was proposed by imec in 2018 [2]. This architecture contains p- and n-MOSFET structures built on top of each other, instead of having them located side-by-side. In our previous blog, we r... » read more

Manufacturing Bits: April 28
By Mark LaPedus - 28 Apr, 2020 - Comments: 1

Gate-all-around reliability The 2020 IEEE International Reliability Physics Symposium (IRPS) will kick off this week, this time as a virtual event. IRPS is a conference that focuses on the latest research in microelectronics reliability. The event starts off with keynotes from Infineon, Intel and Texas Instruments. IRPS also involves a multitude of papers and presentations. On the logi... » read more

Is This The Year Of The Chiplet?
By Ed Sperling - 23 Jan, 2020 - Comments: 2

Customizing chips by choosing pre-characterized — and most likely hardened IP — from a menu of options appears to be gaining ground. It's rare to go to a conference these days without hearing chiplets being mentioned. At a time when end markets are splintering and more designs are unique, chiplets are viewed as a way to rapidly build a device using exactly what is required for a particul... » read more

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