tag: Lam Research

Week In Review: Manufacturing, Test
By Mark LaPedus - 19 Apr, 2019 - Comments: 0

Chipmakers Here comes the battle between 5nm and 6nm processes at two foundry vendors—Samsung and TSMC. Meanwhile, Intel is behind and scrambling to get 10nm out the door. (Intel's 10nm is equivalent to 7nm from the foundries.) Last week, TSMC announced delivery of a complete version of its 5nm design infrastructure. TSMC’s 5nm technology is based on a finFET. This week, Samsung anno... » read more

Lithography Options For Next-Gen Devices
By Mark LaPedus - 18 Apr, 2019 - Comments: 2

Chipmakers are ramping up extreme ultraviolet (EUV) lithography for advanced logic at 7nm and/or 5nm, but EUV isn’t the only lithographic option on the table. For some time, the industry has been working on an assortment of other next-generation lithography technologies, including a new version of EUV. Each technology is different and aimed at different applications. Some are here today, w... » read more

ALD Tungsten Solves Capacity Challenges in 3D NAND Device Manufacturing
By Lam Research - 18 Apr, 2019 - Comments: 0

Our increasingly connected and ever “smarter” world generates increasing amounts of data, putting pressure on manufacturers who face new technical challenges in delivering the increasing capacity required for processing and storage. The ALD Tungsten process is helping 3D NAND manufacturers overcome the technical challenges of producing memory chips with higher storage capacity. 3D NAND a... » read more

From Sand To Wafers
By Steve Proia - 18 Apr, 2019 - Comments: 1

More than most industries, ours is identified with a single element, silicon. Consider the self-adopted naming conventions of all the places that want to be recognized as members of the club—Silicon Valley, Silicon Beach, Silicon Forest and so on. Silicon wafers are fundamental in manufacturing the electronic “chips” that pervade almost every aspect of our lives. New applications in IoT, ... » read more

Blog Review: April 17
By Jesse Allen - 17 Apr, 2019 - Comments: 0

In a video, Mentor's Colin Walls digs into power management in embedded software with a particular look at the Power Pyramid model. Synopsys' Taylor Armerding checks out the state of application security at this year's RSA and finds that while organizations are paying attention to security through training and dedicated teams, roadblocks still remain. Cadence's Paul McLellan considers how... » read more

3D NAND Metrology Challenges Growing
By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 29 Mar, 2019 - Comments: 0

Materials Wesfarmers, an Australian diversified firm, has made an unsolicited bid to acquire Lynas, one of the world’s largest suppliers of rare earths outside of China. Rare earths are chemical elements found in the Earth’s crust. They are used in cars, consumer electronics, computers, communications, clean energy and defense systems. The big market for rare earths is magnets. In semicond... » read more

Blog Review: Mar. 27
By Jesse Allen - 27 Mar, 2019 - Comments: 0

Rambus' Steven Woo takes a look at the memory requirements of neural networks and why some companies are using on-chip memory while others are using HBM2 or GDDR6. Cadence's Lana Chan  observes growing momentum for NVMe and highlights some new features in the latest specification that are pushing mainstream adoption forward. Mentor's Matthew Ballance contends that when it comes to adopti... » read more

Improving SAQP Patterning Yield Using Virtual Fabrication And Advanced Process Control
By Benjamin Vincent - 25 Mar, 2019 - Comments: 0

Advanced logic scaling has created some difficult technical challenges, including a requirement for highly dense patterning. Imec recently confronted this challenge, by working toward the use of Metal 2 (M2) line patterning with a 16 nm half-pitch for their 7nm node (equivalent to a 5nm foundry node). Self-Aligned Quadruple Patterning (SAQP) was investigated as an alternative path to Extreme Ul... » read more

Single Vs. Multi-Patterning EUV
By Mark LaPedus - 25 Mar, 2019 - Comments: 5

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

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