tag: low power

A Framework For Ultra Low-Power Hardware Accelerators Using NNs For Embedded Time Series Classification
By Fraunhofer IIS/EAS - 09 Mar, 2022 - Comments: 0

In embedded applications that use neural networks (NNs) for classification tasks, it is important to not only minimize the power consumption of the NN calculation, but of the whole system. Optimization approaches for individual parts exist, such as quantization of the NN or analog calculation of arithmetic operations. However, there is no holistic approach for a complete embedded system design ... » read more

A Low-Power BLS12-381 Pairing Cryptoprocessor for Internet-of-Things Security Applications
By Technical Paper Link - 21 Feb, 2022 - Comments: 0

Abstract: "We present the first BLS12-381 elliptic-curve pairing cryptoprocessor for Internet-of-Things (IoT) security applications. Efficient finite-field arithmetic and algorithm-architecture co-optimizations together enable two orders of magnitude energy savings. We implement several countermeasures against timing and power side-channel attacks. Our cryptoprocessor is programmable to provid... » read more

An Event-Driven and Fully Synthesizable Architecture for Spiking Neural Networks
By Technical Paper Link - 20 Dec, 2021 - Comments: 0

Abstract:  "The development of brain-inspired neuromorphic computing architectures as a paradigm for Artificial Intelligence (AI) at the edge is a candidate solution that can meet strict energy and cost reduction constraints in the Internet of Things (IoT) application areas. Toward this goal, we present μBrain: the first digital yet fully event-driven without clock architecture, with co-lo... » read more

Towards Decarbonization: Keeping Electronics Energy Consumption In Check
By Frank Schirrmeister - 23 Nov, 2021 - Comments: 0

The International Technology Roadmap for Semiconductors (ITRS) roadmap famously said in 2001 that "cost of design is the greatest threat to the continuation of the semiconductor roadmap." For years, the industry followed the ITRS updates on productivity improvements provided by automating design and hardware to counteract the looming design cost. The discussion on decarbonization has some simil... » read more

Low-Power Always-On Circuits
By Ed Sperling - 27 Sep, 2021 - Comments: 0

Some circuits are always on. A smart phone wakes up when it senses a user, and a smart speaker responds to keywords. The challenge is to make sure these devices don’t consume a lot of power while the rest of a device is powered down, that it remains secure, and that it can quickly wake up whatever other functions are needed. All of this requires a significant amount of engineering work. Amol ... » read more

Power-Aware Test: Addressing Power Challenges In DFT And Test
By Rahul Singhal - 10 Aug, 2021 - Comments: 0

Integrated circuit (IC) sizes continue to grow as they meet the compute requirements of cutting-edge applications such as artificial intelligence (AI), autonomous driving, and data centers. As design sizes increase, the total power consumption of the chip also increases. While process node scaling reduces a transistor’s size and its operating-voltage, power scaling has not kept up with the si... » read more

ASIC/IC Verification Trends With A Focus On Factors Of Silicon Success
By Harry Foster - 08 Jul, 2021 - Comments: 0

At long last we come to the final installment of our four-part series presenting the findings of the Wilson Research Group Functional Verification 2020 study. In this article we discuss verification trends in IC/ASIC language and library adoption, low power management, and verification effectiveness. We then take a deeper dive into two somewhat surprising phenomena revealed in the data: the ... » read more

Tapping Into Non-Volatile Logic
By Bryon Moyer - 21 Apr, 2021 - Comments: 0

Research is underway to develop a new type of logic device, called non-volatile logic (NVL), based on ferroelectric FETs. FeFETs have been a topic of high interest at recent industry conferences, but the overwhelming focus has been using them in memory arrays. The memory bit cell, however, is simply a transistor that can store a state. That can be leveraged in other applications. “Non-v... » read more

SoC Integration Complexity: Size Doesn’t (Always) Matter
By Kurt Shuler - 01 Apr, 2021 - Comments: 2

It’s common when talking about complexity in systems-on-chip (SoCs) to haul out monster examples: application processors, giant AI chips, and the like. Breaking with that tradition, consider an internet of things (IoT) design, which can still challenge engineers with plenty of complexity in architecture and integration. This complexity springs from two drivers: very low power consumption, eve... » read more

Domain-Specific Memory
By Brian Bailey - 11 Mar, 2021 - Comments: 2

Domain-specific computing may be all the rage, but it is avoiding the real problem. The bigger concern is the memories that throttle processor performance, consume more power, and take up the most chip area. Memories need to break free from the rigid structures preferred by existing software. When algorithms and memory are designed together, improvements in performance are significant and pr... » read more

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