Interconnect Challenges Grow


Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

Mask Data Prep Issues Compounding At 20nm


By Ann Steffora Mutschler When it comes to mask data prep—the step in the design and manufacturing flow that occurs just after optical proximity correction (OPC)—challenges have continued to rise with the subsequent moves to smaller geometries. This is driven by the scaling demands of delivering about a 50% area shrink from node to node on a two-year cycle, and thus dictates the lithog... » read more

A Mischievous Muse


By Marc David Levenson Moorissa, the muse of high technology, enjoys playing practical jokes on the mask-makers, whose annual meeting was the week of Sept. 10 in Monterey. It started long ago…For example, no sooner had mask makers learned how to write precise 1X masks with fancy electron beams than the wafer printing industry went to reduction steppers, negating the advantages of all that pr... » read more

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