tag: Mentor Graphics

Estimating Power From Mobile Device Apps
By Ann Mutschler - 09 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler How do software application developers – even the ones sitting at home on their living room sofas with laptops – measure the power consumption of their application on the target device? This is a big problem today (something that is painfully obvious to owners of iPhones or Blackberries), and it will only get bigger. Software engineers may think it is not their... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: As we get to 22nm we’re... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 27 Aug, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: How does software affect ... » read more

Best Practices In Team Building
By Ed Sperling - 26 Aug, 2010 - Comments: 0

By Ed Sperling Putting analog and digital engineers in the same room used to elicit strange looks and under-the-breath comments, but most companies have gotten beyond that stage. Now the question is how to pair them up effectively, get them all on the same team—sometimes even with software engineers thrown into the mix—while still getting a product out the door on time. This is easier s... » read more

Power Conference
By Barry Pangrle - 12 Aug, 2010 - Comments: 0

By Barry Pangrle Big 10, ACC, SEC, Big 12, Pac 10? Well, if you’re thinking of universities that’s a start in the right direction (and there will be a quiz at the end of this blog). If you reside outside of the U.S., I apologize for the local reference. When organizing any technical conference, there’s always a challenge in striking a balance between presenting research that may have... » read more

Defining Power Intent
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ann Steffora Mutschler Designing power-sensitive SoCs has never been more challenging given the tremendous demand for power efficiency in applications ranging from smart phones to servers inside data centers. That makes describing the power control architecture of a chip through power intent essential. Specifically, explained Will Ruby, senior director of product engineering and applicat... » read more

Rethinking Models
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ed Sperling The move to future process nodes will require more than just new materials, better layouts and higher levels of abstraction. It also will require a fundamental re-thinking of how high-level architectural models are created and what’s included in them. While the Transaction-Level Modeling (TLM) 2.0 standard has provided significant improvements for everything from layout to ... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: Corners appears to be get... » read more

ESL Requires New Approaches To Design And Verification
By Ann Mutschler - 22 Jul, 2010 - Comments: 0

By Ann Steffora Mutschler As more data gets front loaded into SoC architectures today, understanding verification challenges as well as communication between the front and back end has never been more critical. “All of this is getting more complicated,” said John Ford, director of marketing at ARM. “There was a time when an ARM processor core was all that was on a chip. Now there’s ... » read more

‘Good’ Vs. ‘Good Enough’
By Ed Sperling - 22 Jul, 2010 - Comments: 0

By Ed Sperling The decision for when a chip is ready for tapeout is changing—both in time and sometimes in terms of who’s actually making that decision—as the amount of software being developed by hardware companies continues to grow. At the root of this shift are two very different concepts about what constitutes a market-ready product. For SoC engineers, fixing bugs after a chip has... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy