Photomask Shortages Grow At Mature Nodes

By Mark LaPedus - 21 Apr, 2022 - Comments: 2

A surge in demand for chips at mature nodes, coupled with aging photomask-making equipment at those geometries, are causing significant concern across the supply chain. These issues began to surface only recently, but they are particularly worrisome for photomasks, which are critical for chip production. Manufacturing capacity is especially tight for photomasks at 28nm and above, driving up ... » read more

Survey: 2022 Deep Learning Applications

By eBeam Initiative - 16 Mar, 2022 - Comments: 0

The 2022 member list of deep learning projects and products that eBeam members are working on in photomask to wafer semiconductor manufacturing. Participating companies include Advantest, ASML, Canon, CEA-LETI, D2S, Fraunhofer IPMS, Hitachi High-Tech Corporation, imec, NuFlare Technology, Siemens Industries Software, Inc.; Siemens EDA, STMicroelectronics, and TASMIT. Click here to see the su... » read more

The Right Project Is Key For Photomask Adoption Of Deep Learning

By Jan Willis - 17 Feb, 2022 - Comments: 0

Deep learning (DL) has become an integral part of the success of many companies. There have been many papers and some reported successes in semiconductor manufacturing, yet only 22% of the luminaries participating in the 2021 eBeam Initiative Luminaries survey see DL as a competitive advantage for photomask making by next year, as shown in figure 1. Looking at that chart, the luminaries believe... » read more

Unsolved Issues In Next-Gen Photomasks

By Mark LaPedus - 17 Feb, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Perspectives On Why EUV Photomasks Are More Expensive

By Jan Willis - 20 Dec, 2021 - Comments: 0

There are fewer photomasks per wafer using EUV lithography, but each EUV photomask is more expensive. Given that, it’s not a surprise that a majority (74%) of industry luminaries surveyed in July say that EUV photomasks will contribute to an increase in photomask revenues for 2021 as shown in figure 1. In a 20-minute video, a panel of experts share their perspectives on what drives EUV photom... » read more

Business, Technology Challenges Increase For Photomasks

By Mark LaPedus - 16 Dec, 2021 - Comments: 0

Pushing the limits of EUV mask repair: addressing sub-10 nm defects with the next generation e-beam-based mask repair tool

By Technical Paper Link - 07 Dec, 2021 - Comments: 0

Abstract "Mask repair is an essential step in the manufacturing process of extreme ultraviolet (EUV) masks. Its key challenge is to continuously improve resolution and control to enable the repair of the ever-shrinking feature sizes on mask along the EUV roadmap. The state-of-the-art mask repair method is gas-assisted electron-beam (e-beam) lithography also referred to as focused electron-beam... » read more

Gearing Up For High-NA EUV

By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Optimizing VSB Shot Count For Curvilinear Masks

By Jan Willis - 19 Aug, 2021 - Comments: 0

The increased photomask write time using a variable-shape e-beam (VSB) writer has been a barrier to the adoption of inverse lithography technology (ILT) beyond the limited usage for hot spots. The second installment of this video blog looked at the challenge in depth. In this five-minute panel video with industry luminaries, Ezequiel Russell describes the collaborative study between his company... » read more

Stacked Nanosheets And Forksheet FETs

By Katherine Derbyshire - 19 Aug, 2021 - Comments: 0

What comes next after gate-all-around FETs is still being worked out, but it likely will involve some version of stacked nanosheets. The design of advanced transistors is a tradeoff. On one hand, it takes less gate capacitance to control a thin channel. On the other hand, thin channels can’t carry as much drive current. Stacked nanosheet designs seek to reconcile these two objectives by... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: photomasks