tag: semiconductor manufacturing

How Curvilinear Mask Writing Affects Chip Design
By Ed Sperling - 12 Apr, 2023 - Comments: 0

As chips become more complex and features continue to shrink, it becomes more difficult to print shapes on photomasks. The ability to print curvilinear masks changes that equation, but not all of the pieces in the flow are automated today. Aki Fujimura, CEO of D2S, talks about what has to change, what will the impact be on design rules, and why using curvilinear shapes can shrink the manufactur... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing
By eBeam Initiative - 15 Mar, 2023 - Comments: 0

Published by the eBeam Initiative Member Companies (February 2023), this list of artificial intelligence (AI) systems used by member companies in their semiconductor manufacturing products shows progress. New examples of systems using AI include: image processing and parameter tuning in lithography tool mask metrology system B-SPline Control Point generation tool sem... » read more

Virtual Process Game To Benchmark Performance of Humans And Computers For Design Of A Semiconductor Fabrication Process
By Technical Paper Link - 09 Mar, 2023 - Comments: 0

A new technical paper titled "Human–machine collaboration for improving semiconductor process development" was published by researchers at Lam Research. Abstract: "One of the bottlenecks to building semiconductor chips is the increasing cost required to develop chemical plasma processes that form the transistors and memory storage cells These processes are still developed manually using h... » read more

New Wafer-Like And Reticle-Like Sensors Deliver Fast, Easy Measurements Inside The Process Chamber
By CyberOptics - 07 Mar, 2023 - Comments: 0

Setup and maintenance operations for semiconductor manufacturing tools can be tedious, time-consuming, and expensive, incurring both direct costs for personnel and resources and indirect costs for lost tool time during extended commissioning of new tools and requalification of repaired or serviced tools. Wafer-like (and reticle-like) sensors (WaferSense® from CyberOptics) provide fast, easy ac... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 03 Mar, 2023 - Comments: 0

Semiconductor Research Corporation (SRC) released an interim roadmap for Microelectronic and Advanced Packaging Technologies (MPAT) that targets 10- to 15-year goals for 3D integration and multi-chiplet packaging. The roadmap is open for comments. Participants in the MPAT include AMD, IBM, Intel, Texas Instruments, Purdue University, SUNY Binghamton and the Georgia Institute of Technology. It i... » read more

Zero Trust Security In Chip Manufacturing
By Ed Sperling - 08 Feb, 2023 - Comments: 0

More equipment vendors and more IP are making the data in a fab much more valuable than in the past, and a potential target for hackers. What’s needed is a different approach to architecting and deploying services and equipment, so breaches can be stopped before they affect other equipment and data, and a better way of sharing data. Brian Buras, production analytics solution architect at Adva... » read more

Driving Toward Net-Zero: Key Takeaways From Semiconductor Sustainability Summit
By Ashley Huang - 15 Dec, 2022 - Comments: 0

To address the climate crisis, countries around the world are pursuing ambitious targets to achieve net-zero carbon emissions by 2050 under the Paris Agreement. In March, Taiwan redoubled its focus on decarbonization by announcing its net-zero pathway, while its Environmental Protection Administration (EPA) under the Executive Yuan is reshaping the Greenhouse Gas Reduction and Management Act in... » read more

Nova METRION Use Cases
By Nova - 14 Dec, 2022 - Comments: 0

Several use cases that we will explore for the Nova METRION® system include contamination control, process excursion prevention, reactor matching, and uniformity control. The objectives of these use cases are to detect contaminants which can kill devices, improve barrier layer and source/drain function, maintain deposition uniformity that impacts downstream processes, and ensure wafer-to-wafer... » read more

Increased Photomask Density And Its Impact On EDA
By Ed Sperling - 13 Dec, 2022 - Comments: 0

The ability to print curvilinear shapes on photomasks can have big repercussions on semiconductor design. Aki Fujimura, CEO of D2S, explains why mask rule checking has been bound by complex design rules, and why curvilinear shapes are important for reducing margin and simplifying the chip design process. » read more

Silent Data Corruption
By Ed Sperling - 12 Dec, 2022 - Comments: 0

Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

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