tag: simulation

Beyond Signoff
By Annapoorna Krishnaswamy - 14 Jun, 2018 - Comments: 0

The future of connectivity is very promising - the new era of semiconductors will give rise to transformational products that will enable seamless connectivity with 5G, smarter devices with AI, next generation mobility with autonomous vehicles and immersive experiences with AR and VR. These cutting-edge electronics systems will require the use of advanced sub-16nm SoCs and complex packaging tec... » read more

Disruption Is Here In Automotive And Ground Transportation: Are You Ready?
By Ansys - 13 Jun, 2018 - Comments: 0

The automotive and ground transportation industry is being disrupted with the rise of shared, connected, self-driving, electrified vehicles. For those who can innovate fast, it is a once-in-a-century opportunity to leapfrog the competition and win the race to dominate the new mobility industry. Simulation is the key enabler. Are you ready for innovation through simulation? Engineering simula... » read more

Progress And Chaos On Road To Autonomy
By Jeff Dorsch - 03 Jun, 2018 - Comments: 1

Progress in the development of fully autonomous vehicles is incremental and slow, but not for lack of effort. Research and development in self-driving cars is under way all around the globe, from the biggest automotive manufacturers and their Tier 1 suppliers to companies not traditionally involved in the automotive industry. Add to that fleets of startups working on sensor technologies and ... » read more

Transistor-Level Performance Evaluation Based On Wafer-Level Process Modeling
By Michael Hargrove - 30 May, 2018 - Comments: 0

Three years ago, I wrote a blog entitled “Linking Virtual Wafer Fabrication Modeling with Device-level TCAD Simulation,” in which I described the seamless connection between the SEMulator3D virtual wafer fabrication software platform and external third-party TCAD software. I’m now happy to report that device-level I-V performance analysis is now a built-in module within the SEMulator3D so... » read more

Understanding The Effect Of Variability In Bulk FinFET Device Performance
By Coventor - 30 May, 2018 - Comments: 0

2-D MOSFETs have proven difficult to scale down to 20nm and beyond. In their place, 3D FinFET transistors have emerged as novel devices that can scale down to lower node sizes. 10nm process finFETs are for SoC product mass production, and research is progressing towards a 7nm process finFET. FinFET transistors provide lower dynamic power consumption (due to flatter I-V curves), improved control... » read more

Analog Migration Equals Redesign
By Ann Mutschler - 24 May, 2018 - Comments: 1

Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

Get Ready For Verification 3.0
By Brian Bailey - 24 May, 2018 - Comments: 0

Jim Hogan, managing partner of Vista Ventures, LLC, is perhaps the best-known investor in the EDA space. Recently, he has been focusing time and attention on verification startups, including cloud technology company Metrics, and Portable Stimulus pioneer Breker Verification Systems. This adds to his longer-term commitment to formal verification with OneSpin Solutions. These companies are part ... » read more

Backchannel Modeling And Simulation Using Recent Enhancements To The IBIS Standard
By Cadence - 23 May, 2018 - Comments: 0

Recent enhancements to the upcoming IBIS standard now support backchannel training, enabling IBIS-AMI models to emulate this real-world SerDes behavior. AMI modelers now can incorporate backchannel algorithms into their IBIS-AMI models, automating the optimization of transmitter and receiver equalization settings in the same manner as their actual SerDes hardware devices. This saves system desi... » read more

EDA In The Cloud (Part 3)
By Brian Bailey - 23 May, 2018 - Comments: 1

Semiconductor Engineering sat down to discuss the migration of EDA tools into the Cloud with Arvind Vel, director of product management at ANSYS; Michal Siwinski, vice president of product management at Cadence; Richard Paw, product marketing manager at DellEMC, Gordon Allan, product manager at Mentor, a Siemens Business; Doug Letcher, president and CEO of Metrics, Tom Anderson, technical marke... » read more

How To Build Functional Safety Into Your Design From The Start
By Antonio Priore - 21 May, 2018 - Comments: 0

The focus on functional safety IP is rapidly growing and we’re seeing this growth not just in automotive but in many other markets including, avionics, medical, industrial and railways, where systems need to efficiently identify and mitigate the occurrences of faults, and where more confidence is required with respect to the design practises employed for the development of IP. Currently, m... » read more

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