Technology Advancements For Dynamic Function eXchange In Vivado ML Edition


As systems become more complex and designers are asked to do more with less, adaptability is a critical asset. While Xilinx FPGAs and SoCs always provided the flexibility to perform on-site device reprogramming, current constraints including increased cost, tighter board space, and power consumption demand even more efficient design strategies. Xilinx Dynamic Function eXchange (DFX) extends the... » read more

The Risk Of Losing Track Of Your IP


What happens when you misuse IP, intentionally or otherwise? Pedro Pires, applications engineer at Cliosoft, talks about the challenges of keeping track of IP across multiple chip design projects, which can grow to include dozens of third-party IP blocks, last for long periods of years, and span multiple continents. » read more

Accelerating Software Development With Fast Virtual Prototypes


Most of today's largest semiconductor devices are highly complex system on chip (SoC) designs, which means that they include one or more embedded processors. This indicates that software provides some of the key functionality of the chip. The system cannot be fully verified or validated without both hardware and software. However, software development generally takes more time and resources to ... » read more

High-Tech: Innovation At The Speed of Light


As connectivity, digitalization, and autonomy proliferate, the boundaries between industries are blurring at an unprecedented pace. Promising to unleash $3TN in global technology market spending, the new competitive battleground is to be found where the system electronics and semiconductor worlds collide: The 3D Integrated Circuit System-on-a-Chip. Winning demands a new design paradigm that ... » read more

Industry Transforming In Ways Previously Unimaginable


Early in the year, everyone expected that the availability of COVID vaccines would signal the start of a return to normal, but that has certainly not been the case. Now the industry is taking a longer-term view about how to transform business, what is necessary for people to maintain their mental health, and how to create robust hybrid work environments for the future that do not discard the po... » read more

Veloce Prototyping Solutions Accelerate Verification Of HPC AI-Enabled SoCs


This white paper goes through the journey of understanding how to meet quality requirements and accelerate time-to-market for your company’s latest flagship high performance computing (HPC) artificial intelligence (AI)-enabled system-on-chip (SoC) design. The starting point in the journey explores the use cases for designs illustrating the impact HPC AI-enabled systems and resources have on o... » read more

Streaming Scan Network: An Efficient Packetized Data Network For Testing Of Complex SoCs


Originally presented at the 2020 International Test Conference by Siemens and Intel authors, this paper describes the Tessent Streaming Scan Network technology and demonstrates how this packetized data network optimizes test time and implementation productivity for today’s complex SoCs. The author-submitted version of the IEEE paper is reprinted here with permission. Authors: Jean-Françoi... » read more

Energy-Efficient SoCs For The Zettabyte Era Using Power-Saving IP And System Design Techniques


As the modern world becomes increasingly connected, businesses and consumers alike are relying more and more on digital data. Behind the scenes, data centers that manage all of this digital data are a somewhat silent, yet impactful, part of this connectivity revolution. These data centers are lined with servers that process digital data for everything from social media status updates to analyti... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects


Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

Wrestling With Analog At 3nm


Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

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