DRAM Scaling Challenges Grow


DRAM makers are pushing into the next phase of scaling, but they are facing several challenges as the memory technology approaches its physical limit. DRAM is used for main memory in systems, and today’s most advanced devices are based on roughly 18nm to 15nm processes. The physical limit for DRAM is somewhere around 10nm. There are efforts in R&D to extend the technology, and ultimate... » read more

Building An MRAM Array


MRAM is gaining traction in a variety of designs as a middle-level type of memory, but there are reasons why it took so long to bring this memory to market. A typical magnetoresistive RAM architecture is based on CoFeB magnetic layers, with an MgO tunneling barrier. The reference layer should have zero net magnetization to make sure that it doesn’t influence the orientation of the free lay... » read more

Magnetic Memories Reach For Center Stage


Wearable heart rate sensors. Networked smoke detectors. Smart lighting. Smart doorbells. While desktop computers and even smartphones are powerful standalone tools, Internet of Things devices share a need to collect data from the environment, store it, and transmit it to some other device for action or further analysis. In many systems, data storage and working memory account for the majorit... » read more

The Next New Memories


Several next-generation memory types are ramping up after years of R&D, but there are still more new memories in the research pipeline. Today, several next-generation memories, such as MRAM, phase-change memory (PCM) and ReRAM, are shipping to one degree or another. Some of the next new memories are extensions of these technologies. Others are based on entirely new technologies or involve ar... » read more

Cloudy Outlook Seen For IC Biz


After a slowdown in the first half of 2019, chipmakers and equipment vendors face a cloudy outlook for the second half of this year, with a possible recovery in 2020. Generally, the semiconductor industry began to see a slowdown starting in mid- to late-2018, which extended into the first half of 2019. During the first half of this year, memory and non-memory vendors were negatively impacted... » read more

Accurate Error Bit Mode Analysis Of STT-MRAM Chip With A Novel Current Measurement Module


Authors: (Advantest) Ryo Tamura, Ibuki Mori Naoyoshi Watanabe; (Tohoku University) Hiroki Koike, Tetsuo Endoh. A novel memory test system is needed for future STT-MRAM mass production that supports error bit analysis and its mode categorization on STT-MRAM chip measurement, as STTMRAM cell’s switching is a probabilistic phenomenon based on quantum mechanics. In order to meet this requireme... » read more

Challenges In Making And Testing STT-MRAM


Several chipmakers are ramping up a next-generation memory type called STT-MRAM, but there are still an assortment of manufacturing and test challenges for current and future devices. STT-MRAM, or spin-transfer torque MRAM, is attractive and gaining steam because it combines the attributes of several conventional memory types in a single device. In the works for years, STT-MRAM features the ... » read more

MRAM: from STT to SOT, for security and memory


Abstract: "Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the leading candidates for embedded memory convergence in advanced technology nodes. It is particularly adapted to low-power applications, requiring a decent level of performance. However, it also have interests for secured applications. The PRESENT cipher is a lightweight cryptographic algorithm targeting ultra... » read more

Embedded Phase-Change Memory Emerges


The next-generation memory market for embedded applications is becoming more crowded as another technology emerges in the arena—embedded phase-change memory. Phase-change memory is not new and has been in the works for decades. But the technology has taken longer to commercialize amid a number of technical and cost challenges. Phase-change memory, a nonvolatile memory type that stores data... » read more

Power/Performance Bits: Jan. 22


Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

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