Magnetic Memories Reach For Center Stage

Why MRAM technology works best for connected devices.


Wearable heart rate sensors. Networked smoke detectors. Smart lighting. Smart doorbells. While desktop computers and even smartphones are powerful standalone tools, Internet of Things devices share a need to collect data from the environment, store it, and transmit it to some other device for action or further analysis.

In many systems, data storage and working memory account for the majority of the circuit’s total footprint. Battery-powered IoT devices face stringent limitations on both standby and active power consumption, but they are expected to retain their data if the battery fails. Together, these constraints describe a potential market opportunity for a non-volatile memory that is faster than flash and able to scale below the six-transistor footprint needed for SRAM.

ReRAM, PCRAM, and MRAM all have been suggested as candidates for these new applications. While the analog characteristics of ReRAM have caught the attention of machine learning and compute-in-memory researchers, those same characteristics limit their usefulness in conventional memory applications. PCRAM’s relatively low endurance is compatible with storage applications, but not with the duty cycles of computational working memory. MRAM devices have better endurance and are inherently bistable, always switching between high and low resistance states.

From data storage to magnetic memory
Data storage has relied on magnetic media since the earliest days of the electronics industry. The first crude magnetic recorder was invented in 1898. That early recorder used 7,200 feet of wire for an hour-long audio recording, while modern hard drives store more than 500 gigabits per square inch of platter area. As data density has increased the industry has needed to detect smaller magnetic fields with finer spatial resolution. Since 2004, that need has been filled by magnetic tunnel junctions.

As Alexey Khvalkovskiy and colleagues at Samsung explained in a comprehensive review, a magnetic tunnel junction consists of a reference layer, pinned in a predefined orientation, separated from a free layer by a non-magnetic barrier. The orientation of the free layer changes in response to an external magnetic field, such as might be supplied by a “1” bit on a data platter. When the magnetizations of the free and reference layers are aligned in the same direction, current easily can tunnel through the barrier layer and resistance is low. When the free layer is aligned anti-parallel to the reference layer, tunneling is difficult and resistance is high.

For this tunneling magnetoresistance (TMR) effect to support a viable electronic memory device, however, two significant advances were required. The first, as Albert Fert explained in his Nobel Prize lecture, was the realization that a crystalline barrier layer — MgO in current devices — can filter electrons based on their spins, preferentially passing carriers with spins matching the alignment of the magnetic layers. Spin selectivity increases the change in resistance between the parallel and anti-parallel magnetic states, making the junction more sensitive as a sensor and increasing the read margin for a memory element. (This phenomenon also explains why these devices are called “spin valves.”)

The second significant advance derives from the first. If a magnetic tunnel junction is part of an electronic circuit, it must be possible to “open” or “close” the spin valve electronically, rather than by applying a magnetic field. When a current passes through the reference layer, through the tunneling barrier, and into a free layer with anti-parallel alignment, the electron spins — filtered by the tunneling barrier — are misaligned relative to the free layer. As a result, the electrons encounter higher resistance and shed some of their angular momentum.

Where does the “lost” momentum go? Angular momentum is conserved. Some fraction of it is transferred to the magnetic domains of the free layer. Above some critical current, this “spin-transfer torque” “pushes” the free layer into parallel alignment. The spin-transfer torque (STT) MRAM depends on this effect.

Fig. 1: Treatment creates high-quality MgO barrier and interfaces. Source: Applied Materials

Engineering magnetic anisotropy
Devices can be built around differences between parallel and anti-parallel magnetic orientations because ferromagnetic materials are anisotropic. The magnetic domains preferentially align along specific directions, rather than randomly. Practical MRAM designs control and exploit magnetic anisotropy.

Magnetic anisotropy has three sources, any of which may be involved in a particular device structure. First, it arises from the properties of the bulk material. Layered crystalline structures typically offer the largest difference between the “easy” and “hard” magnetization directions, Khvalkovskiy said. In materials like FePt, FePd, and CoFeB, the in-plane and out-of-plane directions are not equivalent.

CoFeB is the most common choice for MRAM designers. For best device performance these layers should be precisely aligned with the substrate, with the MgO tunnel barrier, and with the top and bottom electrodes. Devices that depend entirely on bulk magnetic anisotropy are difficult to scale, though, because thicker layers tend to be more thermally stable and less prone to re-orient themselves due to thermal fluctuations.

Second, lattice perturbations and electronic orbital hybridization at interfaces can cause localized interfacial magnetic anisotropy. Designs based on interfacial anisotropy benefit from multi-layer stacks. They become more stable as the surface to volume ratio increases.

Finally, device shape contributes to anisotropic magnetic behavior. The best devices are round or elliptical, with the long axis of the ellipse aligned with the preferred magnetization direction of the material. At smaller dimensions, edge effects and shape variability cause resistance to fluctuate with the device footprint. Device shape and shape anisotropy help define the device’s thermal stability.

Thermal stability also depends on the material and the magnetic field. It determines how well the memory retains data, and helps establish the critical current needed to switch between the high and low resistance states. While spin-transfer torque provides the energy needed for the transition, and STT efficiency measures the amount of torque at a given applied current, the thermal stability determines how much energy will be required. Moreover, the device structures must be stable enough to tolerate subsequent thermal processes such as back-end-of-line annealing and solder reflow during circuit assembly.

As noted above, the tunneling magnetoresistance ratio — the resistance difference between the high and low states — defines the read margin of the device. It depends on the spin-selectivity of the component layers, and on the lattice match between the magnetic layers, the tunnel barrier, and the electrodes.

Devices that are oriented so that the preferred magnetization direction is in the plane of the substrate are easier to manufacture because the substrate provides a convenient alignment template. However, Sabpreet Bhatti, a graduate student at Singapore’s Nanyang Technological University, explained that devices with perpendicular anisotropy are easier to scale. When the magnetization is aligned with the substrate, smaller devices necessarily have smaller magnetic domains and are more susceptible to edge effects. When devices are aligned perpendicular to the plane, the domain size and the lateral dimensions can change independently.

After TMR ratio and thermal stability, critical current is the third measure of MRAM behavior. It depends on the thermal stability, on STT efficiency, and on the damping characteristics of the material. When the MRAM switches, a current pulse applies some amount of spin-transfer torque to the ferromagnetic domains, which are already (at non-zero temperature) experiencing thermal oscillations. The thermal stability of the material determines how large the oscillations are, while the damping factor determines how quickly they die down once the pulse is removed. A material with high damping stabilizes in the “on” state more quickly, Bhatti said, but requires more current to switch in the first place.

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Ed Korczynski says:

Excellent technology reporting! I’ve heard good things about embedded-MRAM for high-reliability SOCs…

Andrew Walker says:

Excellent article. One of the startling differences between MRAM and all other nonvolatile solid state memories is its stochastic switching. In other words, the probability of switching between the two states is a function of write/erase voltages and not the separation between the two states. Besides having consequences in circuit design, this unusual property can be used in AI applications to improve energy efficiency.

Frederick Chen says:

ReRAM cannot be covered by the blanket statement here; it’s a wider playing ground actually. The resistance ratio of MRAM in particular is quite minimal.

Katherine Derbyshire says:

Thank you for reading!

Yes, I definitely agree that ReRAM is a big topic. There’s quite bit of ReRAM coverage elsewhere at Semiconductor Engineering; my own most recent look at the space is here:

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