tag: Synopsys

Aging: Not Always A Bad Thing
By Ann Mutschler - 22 Aug, 2013 - Comments: 0

By Ann Steffora Mutschler When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. Determining how a device will operate over time is a key aspect of overall reliability and is commonly referred to as ‘aging.’ Aging of electronics is not a new problem. In fact, analog and automotive designers have bee... » read more

DDR White Paper
By Various Writers - 22 Aug, 2013 - Comments: 0

DDR DRAM memory controllers have many competing demands on them. A good memory controller must improve the bandwidth of the memory interface while respecting the latency demands of the CPU, graphics, and real-time DRAM in the system while maintaining compliance with memory bus and on-chip bus standards. The read reorder buffer (RRB) is a silicon-proven architectural enhancement available in... » read more

Managing Memory With Embedded Software
By Ann Mutschler - 22 Aug, 2013 - Comments: 0

By Ann Steffora Mutschler Memory is shaping up to be a key leverage point for embedded software going forward as it represents such a large fraction of the silicon real estate in today’s SoCs. Managing memory effectively and memory bandwidth also represents a significant fraction of the potential bottlenecks and the power dissipation. As such, everything embedded software can do to enhance h... » read more

Experts At The Table: Next-Generation IP Landscape
By Ann Mutschler - 22 Aug, 2013 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss predictions about the next generation design IP landscape with Robert Aitken, R&D fellow at ARM; Laurent Moll, chief technical officer at Arteris; Susan Peterson, group director, product marketing for verification IP & memory models in the system & software realization group at Cadence; and John Koeter, vice preside... » read more

DDR White Paper
By Various Writers - 22 Aug, 2013 - Comments: 0

DDR DRAM memory controllers have many competing demands on them. A good memory controller must improve the bandwidth of the memory interface while respecting the latency demands of the CPU, graphics, and real-time DRAM in the system while maintaining compliance with memory bus and on-chip bus standards. The read reorder buffer (RRB) is a silicon-proven architectural enhancement available in... » read more

Blog Review: Aug. 21
By Ed Sperling - 21 Aug, 2013 - Comments: 0

By Ed Sperling Mentor’s Michael Ford recalls the worst meetings in the world—ones that involve materials in the manufacturing process. Unfortunately there were a lot of them, so they were more like working in a recurring nightmare. Paging Freddie Krueger. Synopsys’ Karen Bartleson talks with Angisys CEO Anupam Bakshi about why EDA companies need to collaborate, and what’s the risk ... » read more

The Week In Review: Aug. 16
By Ed Sperling - 16 Aug, 2013 - Comments: 0

By Ed Sperling Manufacturing Equipment giant Applied Materials added three extra letters company president Gary Dickerson’s title—CEO. Mike Splinter, who has served as the company’s CEO since 2003, will become executive chairman of the board of directors. Dickerson was the CEO of Varian, which Applied Materials acquired in 2011. Synopsys introduced a Dolby decoder for its ARC process... » read more

Experts At The Table: Low-Power Verification
By Ed Sperling - 16 Aug, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss power format changes with Sushma Hoonavera-Prasad, design engineer in Broadcom’s mobile platform group; John Biggs, consultant engineer for R&D and co-founder of ARM; Erich Marschner, product marketing manager at Mentor Graphics; Qi Wang, technical marketing group director at Cadence; and Jeffrey Lee, corporate ap... » read more

Can Mask Data Prep Tools Manage Data Glut?
By Ann Mutschler - 15 Aug, 2013 - Comments: 0

By Ann Steffora Mutschler The trend to reduce critical dimension sizes has in turn increased design file sizes, especially with the addition of optical proximity correction (OPC) steps. This extra data translates to a bigger burden to be processed downstream in the flow on the way to the mask writer. At 28nm, design post-OPC data files sizes reach hundreds of gigabytes. With 20nm and below ... » read more

Blog Review: Aug. 14
By Ed Sperling - 14 Aug, 2013 - Comments: 0

By Ed Sperling Synopsys’ Eric Huang unveils the fastest USB ever. The seat belt is extra. Mentor’s Nazita Saye sees the light—well, at least a refracted version of it—through the lens of a plastic bottle. This one is a real energy saver for the money, even if you have to forfeit the recycling fee. Check out the link. Cadence’s Brian Fuller takes a sledgehammer to the semicond... » read more

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