tag: Synopsys

Architecting For Optimal Interface IP Integration
By Ann Mutschler - 10 Mar, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss the design and integration of complex interface [getkc id="43" comment="IP"] with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Saman Sadr, director of analog design at Semtech; and Nav... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 Mar, 2015 - Comments: 0

Mergers & Acqusitions Mentor Graphics acquired Tanner EDA, bolstering their position in tools for analog, mixed-signal and MEMs. Terms of the deal were not disclosed. NXP joins forces with Freescale. The merger carries a $16.7 billion price tag and potentially creates a new leader in the automotive and MCU markets. Standards Accellera sent UVM 1.2 off to the IEEE P1800.2 working... » read more

Blog Review: March 4
By Jesse Allen - 04 Mar, 2015 - Comments: 0

Is gate-level simulation still necessary? Mentor's Gordon Allan asserts it is, and gives a list of reasons why the pain is worth the peace of mind. Synopsys' Aron Pratt concludes his series on parameterization strategies with a process that allows the testbench to make use of parameterized interfaces without imposing limits on VIP access. Should you use EUV or quadruple patterning for 7nm... » read more

The Week In Review: Design/IoT
By Jesse Allen - 27 Feb, 2015 - Comments: 0

Mergers & Acquisitions NXP acquired Quintic’s Bluetooth Low Energy and Wearable businesses, adding BLTE to their low power RF-connectivity portfolio. The team of approximately 65 is expected to join NXP when the deal closes in Q1 2015. Tools Cadence unveiled the integration of Forte's Cynthesizer with their own C-to-Silicon Compiler. The result is the Stratus high-level synthesis... » read more

Mentor Graphics Buys Tanner EDA
By Ed Sperling - 26 Feb, 2015 - Comments: 4

By Ed Sperling & Brian Bailey [getentity id="22017" e_name="Mentor Graphics"] has just purchased [getentity id="22561" e_name="Tanner EDA"] for an undisclosed sum, according to sources close to the deal. The acquisition moves Mentor squarely into the analog and mixed signal tools world, while positioning it to play a much bigger role in the Internet of Things market. Mentor isn't t... » read more

Partition Lines Growing Fuzzy
By Ed Sperling - 26 Feb, 2015 - Comments: 0

For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

IP Market Booms At Advanced Nodes
By Ann Mutschler - 26 Feb, 2015 - Comments: 0

As [getkc id="81" kc_name="SoC"] design and manufacturing costs rise, system OEMs are wringing as much of that increase as they can from ASIC vendors. The result is that engineering teams on the design and test side are being constrained by budgets at a time when complexity is rising and time-to-market pressures are increasing. At least one segment is benefiting from directly this. Budgetary... » read more

Custom Versus Platform Design
By Ed Sperling - 26 Feb, 2015 - Comments: 0

The increase in [getkc id="81" kc_name="SoC"] complexity is being mirrored by a rise in complexity within the markets that drive demand for those chips. The upshot is that a push toward greater connectivity, lower power and better performance—and all for a minimal cost—has turned the pros and cons for custom design vs. platforms and superchips into a murky decision-making process. For t... » read more

First Time Success And Cost Control
By Brian Bailey - 26 Feb, 2015 - Comments: 0

First time success has been the ultimate goal for semiconductor companies due to escalating mask costs, as well as a guiding objective for the development of EDA tools, especially in the systems and verification space. These pressures are magnified for the [getkc id="76" comment="Internet of Things"] (IoT), especially the edge devices. Have system-level tools been able to contribute to first ti... » read more

Better Software. Faster! A Virtual Prototyping Case Study From Kyocera Document Solutions
By Tom De Schutter - 26 Feb, 2015 - Comments: 0

From time to time I like to use this blog to provide you with an update about the "Better Software. Faster!" book that illustrates the best practices in virtual prototyping. This time, I am happy to announce that Mamoru Kani-san, senior manager, R&D department 22, software 2 R&D division of the corporate software development division of Kyocera Document Solutions, wrote a new case study... » read more

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