tag: TCAD

Transistor-Level Performance Evaluation Based On Wafer-Level Process Modeling
By Michael Hargrove - 30 May, 2018 - Comments: 0

Three years ago, I wrote a blog entitled “Linking Virtual Wafer Fabrication Modeling with Device-level TCAD Simulation,” in which I described the seamless connection between the SEMulator3D virtual wafer fabrication software platform and external third-party TCAD software. I’m now happy to report that device-level I-V performance analysis is now a built-in module within the SEMulator3D so... » read more

New Thermal Issues Emerge
By Ann Mutschler - 12 Feb, 2018 - Comments: 0

Thermal monitoring is becoming more critical as gate density continues to increase at each new node and as chips are developed for safety critical markets such as automotive. This may sound counterintuitive because the whole point of device scaling is to increase gate density. But at 10/7 and 7/5nm, static current leakage is becoming a bigger issue, raising questions about how long [getkc id... » read more

Tech Talk: Substrate Noise Coupling
By Ed Sperling - 14 Dec, 2017 - Comments: 0

Roland Jancke, head of the department for design methodology for the Fraunhofer's Engineering of Adaptive Systems Division, talks with Semiconductor Engineering about the impact of substrate noise coupling on reliability of chips and how to deal with this issue. https://youtu.be/7E2rCwYr6-o » read more

Multi-Physics Combats Commoditization
By Brian Bailey - 14 Sep, 2017 - Comments: 0

The semiconductor industry has benefited greatly from developments around digital circuitry. Circuits have grown in size from a few logic gates in the 1980s to well over 1 billion today. In comparison, analog circuits have increased in size by a factor of 10. The primary reason is that digital logic managed to isolate many of the physical effects from functionality, and to provide abstractions ... » read more

Power Challenges At 10nm And Below
By Ann Mutschler - 11 May, 2017 - Comments: 1

Current density is becoming much more problematic at 10nm and beyond, increasing the amount of power management that needs to be incorporated into each chip and boosting both design costs and time to market. Current per unit of area has been rising since 90nm, forcing design teams to leverage a number of power-related strategies such as [getkc id="143" kc_name="dynamic voltage and frequency... » read more

Analog’s Unfair Disadvantage
By Brian Bailey - 11 May, 2017 - Comments: 0

We live in an analog world, and yet digital has become the technology of choice. Mixed-signal solutions that used to contain significant amounts of analog, with just a small amount of digital signal processing, have migrated into systems where the analog to digital conversion happens at the very first opportunity. There are several reasons for this, and some of them build upon themselves. [g... » read more

New Architectures, Approaches To Speed Up Chips
By Ed Sperling - 15 Aug, 2016 - Comments: 2

The need for speed is back. An explosion in the amount of data that needs to be collected and processed is driving a new wave of change in hardware, software and overall system design. After years of emphasizing power reduction, performance has re-emerged as a top concern in a variety of applications such as smarter cars, wearable devices and cloud data centers. But how to get there has cha... » read more

Synopsys Buys Gold Standard Simulations
By Brian Bailey - 23 May, 2016 - Comments: 1

[getentity id="22035" e_name="Synopsys"] has made another quiet acquisition, this time in the TCAD space. [getentity id="22272" comment="Gold Standard Simulations (GSS)"] offers a suite of solutions for design technology co-optimization (DTCO), PDK development and exploration and screening of future technology options. Their tool chain integrates predictive Monte Carlo and statistical TCAD s... » read more

Synopsys Buys Simpleware
By Ed Sperling - 20 May, 2016 - Comments: 0

Synopsys bought [getentity id="22916" comment="Simpleware"], which makes tools for turning 3D images into models that can be used in simulation. The deal extends [getentity id="22035" e_name="Synopsys"] into a spectrum of new markets, including medical, dental, oil and gas and even food sciences and archaeology. While the company still has a play in computer-aided engineering and design, Sim... » read more

FinFET Scaling Reaches Thermal Limit
By Brian Bailey - 12 May, 2016 - Comments: 2

In 1974, Robert H. Dennard was working as an IBM researcher. He introduced the idea that MOSFETs would continue to work as voltage-controlled switches in conjunction with shrinking features, providing doping levels, the chip's geometry, and voltages are scaled along with those size reductions. This became known as Dennard's Law even though, just like Moore's Law, it was anything but a law. T... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy