tag: UCIe

Looking Inside Of Chips
By Ed Sperling - 10 Jan, 2023 - Comments: 0

Shai Cohen, co-founder and CEO of proteanTecs, sat down with Semiconductor Engineering to talk about how to boost reliability and add resiliency into chips and advanced packaging. What follows are excerpts of that conversation. SE: Several years ago, no one was thinking about on-chip monitoring. What's changed? Cohen: Today it is obvious that a solution is needed for optimizing performanc... » read more

Adapting To Broad Shifts Essential In 2022
By Brian Bailey - 21 Dec, 2022 - Comments: 0

Change creates opportunity, but not every company is able to respond quickly enough to take advantage of those opportunities. Others may respond too quickly, before they properly understand the implications. At the start of a typical year, optimism is in plentiful supply. Any positive trend is seen as continuing, and any negative is seen as turning around. Normally the later in the year that... » read more

The March Toward Chiplets
By Ed Sperling and Karen Heyman - 15 Dec, 2022 - Comments: 0

The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

3D-IC Reliability Degrades With Increasing Temperature
By Ann Mutschler - 14 Dec, 2022 - Comments: 0

The reliability of 3D-IC designs is dependent upon the ability of engineering teams to control heat, which can significantly degrade performance and accelerate circuit aging. While heat has been problematic in semiconductor design since at least 28nm, it is much more challenging to deal with inside a 3D package, where electromigration can spread to multiple chips on multiple levels. “Be... » read more

Edge AI And Chiplets
By Andy Heinig - 08 Dec, 2022 - Comments: 0

In the near future, more edge artificial intelligence (AI) solutions will find their way into our lives. This will be especially true in the private sector for applications in the field of voice input and analysis of camera data, which will become well-established. These application areas require powerful AI hardware to be able to process the corresponding continuously accumulating data volumes... » read more

An Arrangement of Chiplets That Outperforms A Grid Arrangement (ETH Zurich / U. of Bologna)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A research paper titled "HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement" was published by researchers at ETH Zurich and University of Bologna. Abstract: "2.5D integration is an important technique to tackle the growing cost of manufacturing chips in advanced technology nodes. This poses the challenge of providing high-performance inter-chiplet interconnects ... » read more

Is UCIe Really Universal?
By Brian Bailey - 22 Nov, 2022 - Comments: 3

Chiplets are rapidly becoming the means to overcome the slowing of Moore's Law, but whether one interface is capable of joining them all together isn't clear yet. The Universal Chiplet Interconnect Express (UCIe) believes it will work, but some in the industry remain unconvinced. At least part of the problem is that interconnect standards are never truly finished. Even today, the protocols tha... » read more

The Politics Of Standards
By Brian Bailey - 22 Nov, 2022 - Comments: 1

Standards often are seen as an industry coming together to agree upon a common solution to a common problem, but there are times when this could not be further from the truth. Having been involved in standards at all levels — from participant to chair for several standards — some were successful, some were not, some are seeing significant adoption while others are withering by the wayside, ... » read more

What’s So Different About Interposer Signal Integrity?
By Kelly Damalou - 28 Oct, 2022 - Comments: 0

By Kelly Damalou and Pete Gasperini To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an impressive evolution over the last several decades. Their development encourages technological advancement in applications like high-performance computing, Artificial... » read more

Raising IP Integration Up A Level
By Brian Bailey - 27 Oct, 2022 - Comments: 0

An increase in the number and complexity of IP blocks, coupled with changing architectures and design concerns, are driving up the need for new tools that can enable, automate, and optimize integration in advanced chips and packages. Power, security, verification and a host of other issues are cross-cutting concerns, and they make pure hierarchical approaches difficult. Adding to future comp... » read more

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