Materials And Technologies For High Temperature, Resilient Electronics


A technical paper titled “Materials for High Temperature Digital Electronics” was published by researchers at University of Pennsylvania, Air Force Research Laboratory, and Ozark Integrated Circuits. Abstract: "Silicon microelectronics, consisting of complementary metal oxide semiconductor (CMOS) technology, have changed nearly all aspects of human life from communication to transportatio... » read more

Unknowns And Challenges In Advanced Packaging


Dick Otte, CEO of Promex Industries, sat down with Semiconductor Engineering to talk about unknowns in material properties, the impact on bonding, and why environmental factors are so important in complex heterogeneous packages. What follows are excerpts of that conversation. SE: Companies have been designing heterogeneous chips to take advantage of specific applications or use cases, but th... » read more

Case Study — 3D Wire Bond Inspection and Metrology


The growing amount of electronics within modern vehicles has made the inspection process for wire bonds increasingly challenging, as active devices shrink and bonds are arranged in complex ways. CyberOptics addressed the need for an automated solution to replace labor-intensive and imprecise manual inspection methods for wire bonds and loop heights. After consideration of competitive products, ... » read more

Investigation of integrated factors in the occurrence of copper wire bonding corrosion of semiconductor packages


Abstract "Copper wire bonding has got attracted attention over gold wire bonding due to its lower cost. However, despite many unique aspects and properties of copper wire bonding, corrosion of copper wire bonding has become a point of interest as it leads to the failure of semiconductor packages. Current and future trends and development in miniaturization and multifunction of the semico... » read more

A Broad Look Inside Advanced Packaging


Choon Lee, chief technology officer of JCET, sat down with Semiconductor Engineering to talk about the semiconductor market, Moore’s Law, chiplets, fan-out packaging, and manufacturing issues. What follows are excerpts of that discussion. SE: Where are we in the semiconductor cycle right now? Lee: If you look at 2020, it was around 10% growth in the overall semiconductor industry. ... » read more

Attaching Fibers To Photonic Chips


Recently, Cadence held its fifth photonics summit, CadenceCONNECT: Photonics Contribution to High-Performance Computing. You can read my earlier posts: Photonic Integration—From Switching to Computing How to Design Photonics If You Don't Have a PhD: iPronics and Ayar Labs The third day was all about how to connect the incoming and outgoing fibers to the photonics chips. I will cov... » read more

Wirebond Technology Rolls On


Several years ago, many predicted the demise of an older interconnect packaging technology called wire bonding, prompting the need for more advanced packaging types. Those predictions were wrong. The semiconductor industry today uses several advanced packaging types, but wire bonding has been reinvented over the years and remains the workhorse in packaging. For example, Advanced Semiconducto... » read more