GAA NSFETs modeling; chiplets for large-scale computing; extending memory with emerging NVM; reconfigurable chiplet architecture; diamond semiconductors; chirality CNTs; wireless battery management; Si photonics.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors | National Yang Ming Chiao Tung University |
| Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets | University of Pittsburgh, Lightelligence, and Meta |
| Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD | ETH Zurich, University of Illinois Urbana-Champaign, Google, and Rivos |
| DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications | Princeton University |
| Diamond p-Type Lateral Schottky Barrier Diodes With High Breakdown Voltage (4612 V at 0.01 mA/Mm) | University of Illinois at Urbana–Champaign |
| Engineering chirality at wafer scale with ordered carbon nanotube architectures | Rice University, University of Utah, J.A. Woollam Co. and Tokyo Metropolitan University |
| Wireless BMS Architecture for Secure Readout in Vehicle and Second life Applications | TU Graz and NXP |
| Lateral Tunnel Epitaxy of GaAs in Lithographically Defined Cavities on 220 nm Silicon-on-Insulator | Cardiff University and University of Southampton |
More Reading
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