Week In Review: Design, Low Power

RISC-V implementation verification; AWS and design tools; digital twins and EDA.


Tools, Cloud, IP
Valtrix Systems updated its STING design verification tool for RISC-V based CPU and SoC implementations. Version 1.9.0 adds support to verify recent changes to the RISC-V user and privilege specifications, including draft versions of the vector and bit manipulation standard extensions. Preliminary support for the draft version of the RISC-V hypervisor extension has also been added. The new version also enables the capability of on-target test generation in STING for the post-silicon testing needs of RISC-V along with a new self-contained mode of execution.

Amazon Web Services (AWS) deployed Synopsys VCS Fine-Grained Parallelism (FGP) simulation technology running on Arm-based Graviton2 servers to provide higher simulation throughput. “Using Synopsys verification tools on AWS Graviton2 allows us to perform full chip simulation at lower cost,” said David Brown, Vice President, Amazon EC2, AWS.

Arm is moving the majority of its EDA workloads to AWS Arm-based Graviton2 instances and said it has seen 6x improvement in performance time for EDA workflows on AWS and see the potential for increasing throughput by 10x. The company’s goal is to move most of its design work to Arm-based cloud services over the next several years.

Mentor will be known as Siemens EDA starting in January. The name change is intended to bring together EDA software with Siemens technology platforms for simulation, mechanical design, manufacturing, cloud, IoT and low-code. Executive Vice President of IC-EDA Joseph Sawicki writes that the division will be putting a larger focus on digital twins for SoC design and verification.

Menlo Micro introduced MM6005, a high-power 7-channel reconfigurable filter utilizing the company’s low parasitics switch technology. Targeting global UHF military bands, the technology is scalable to support any number of filter channels as well as frequencies up to 50 GHz.

Synopsys released the latest version of its illumination design software. LightTools 9.1 adds new tools to model and analyze lidar, AR/VR, and biomedical systems. Additionally, it introduces a Distributed Simulation Module that increases the speed of computation-intensive ray tracing, as well as improved optomechanical interoperability with Dassault Systèmes’ SOLIDWORKS 3D CAD software.

Telechips selected several Arm IPs for use in its Dolphin5 automotive SoC targeted for applications like ADAS, digital cockpit, and in-vehicle infotainment. The design will include the Arm Mali-G78AE graphics processor with functional safety capabilities along with the Cortex-A76 processor and Ethos-N78 Neural Processing Unit (NPU). Telechips also signed up for Arm Flexible Access and is working with GAONCHIPS in utilizing the Samsung Foundry process for Arm-based SoCs.

Samsung Foundry certified the complete Cadence system analysis and advanced packaging design tool flow as a Samsung Multi-Die Integration (MDI) advanced packaging reference flow for planning, implementation, verification and signoff of 2.5D and 3D multi-die chip designs.

Two new companies joined Mixel’s MIPI Central ecosystem. Sofics will add analog I/Os, specialty digital I/Os, and ESD protection while Hardent will add video compression IP cores to the available compatible offerings for Mixel MIPI IP customers.

Verific will partner with DARPA to provide projects funded by the agency and companies participating in Electronics Resurgence Initiative (ERI) programs with its EDA software, specifically SystemVerilog parser and static and RTL elaborators.

While the outlook appears rosy for much of the semiconductor industry, a shortage of chips is hitting consumer electronics and automotive companies, analysts told Reuters. The shortage is primarily attributed to demand increasing while 200mm fab capacity didn’t, with component suppliers for consumer products expecting delays of several months. NXP is reportedly raising prices dues to increased materials costs and chip shortages.

TSMC expects demand to remain high throughout the first half of next year and doesn’t think there will be a problem of overbuilt inventory, according to Taipei Times. Meanwhile, Digitimes Research expects that China will be pushing to increase 200mm fab capacity in the coming year, with multiple China-based design houses as well as international companies expanding manufacturing capacity in the country.

The Accellera Universal Verification Methodology (UVM) Working Group completed work on its UVM-2020 1.0 reference implementation. The new reference implementation is aligned with the latest IEEE 1800.2-2020 Standard for UVM. “The changes in the 2020 LRM are primarily fixes to a small number of API that were erroneously specified in the earlier version in 2017,” said Mark Strickland, UVM Working Group Chair. “Along with implementing these LRM updates, the new reference implementation addresses some errata that have existed in the UVM-1.2 implementation.” The IEEE standard is now available for download at no charge under the IEEE Get program.

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