Week In Review: Design, Low Power

Nvidia again made its case for acquiring Arm to the UK’s Competition and Markets Authority (CMA). “Arm is a private for-profit business at a crossroads. After acquiring Arm several years ago, SoftBank increased Arm’s headcount, hoping to spur long-term growth in several markets, including data center and personal computer, long dominated by Intel and x86. SoftBank’s investment phase has concluded, and one way or another, SoftBank intends to exit Arm,” it said in the filing. It noted that SoftBank approached Nvidia about the acquisition, and argues that rather than suppressing competition, the combination would make for a stronger competitor against Intel and x86 in the data center – a key area regulators have flagged as concerning. “Regardless of the transaction, Nvidia will continue to support x86 and work with Intel, AMD, and others in the x86 ecosystem,” the filing noted, adding that Nvidia is developing its Omniverse platform on x86 systems. Nvidia also argued that an Arm IPO would stagnate the company. The filing is part of the CMA’s Phase 2 inquiry, which is expected to last until May. The deal faces intense scrutiny from other regulators around the world.

Quantum computing startups Pasqal and Qu&Co are merging. Pasqal develops quantum hardware based on neutral atom technology, which controls neutral atoms with optical “tweezers” and can operate at room temperature. Qu&Co develops quantum algorithms and software for computational finance, fluid dynamics and chemistry. The combined company plans to deliver a 1000-qubit quantum solution in 2023. “Leveraging the synergies of the two companies will further strengthen our full-stack, neutral-atom solution in achieving near-term commercial benefit,” said Georges-Olivier Reymond, CEO of Pasqal.  “Qu&Co’s technology and exceptional talent base has proven itself across several industries and will allow us to solidify our position as a global quantum computing leader. Our combined platform will be made available through the cloud to all partners in the Pasqal ecosystem, including clients, software developers and others.” The combined company will continue as Pasqal and be based in Paris, France.

Design, tools, IP
PCI-SIG published the PCI Express (PCIe) 6.0 specification, which increases the raw data rate to 64 GT/s, with up to 256 GB/s available via x16 configuration. Key to the increase is the use of PAM4 signaling, which uses four amplitude levels. To mitigate the bit error rate increase, it also adds lightweight Forward Error Correction (FEC) and Cyclic Redundancy Check (CRC). It also includes FLIT mode, in which packets are organized in Flow Control Units of fixed sizes, and a new Low Power State, L0p, that enables traffic to run on a reduced number of lanes to save power. It is backwards compatible with previous generations of PCIe. “With the PCI Express SSD market forecasted to grow at a CAGR of 40% to over 800 exabytes by 2025, PCI-SIG continues to meet the future needs of storage applications,” said Greg Wong, founder and principal analyst, Forward Insights. “With the storage industry transitioning to PCIe 4.0 technology and on the cusp of introducing PCIe 5.0 technology, companies will begin adopting PCIe 6.0 technology in their roadmaps to future-proof their products and take advantage of the high bandwidth and low latency that PCI Express technology offers.”

OpenEdges debuted 4-/8-bit mixed-precision NPU IP. The neural network processor IP features an optimized network model compiler that moves DRAM traffic from intermediate activation data by grouped layer partition and scheduling. In addition, it supports load balancing partition for multi-core NPU. It targets AI inference applications.

3D perception company Light adopted Cadence’s Tensilica Vision Q7 DSP for use in its Clarity Depth Perception Platform, which provides long-range, high-resolution depth perception using industry-standard cameras for ADAS applications. “Integrating the Cadence Tensilica Vision Q7 DSP provides us with enhanced signal processing capabilities at low power with low latency, which complement the technology in the platform, helping us to provide accurate and reliable measured depth for future ADAS systems. Additionally, integrating ISO 26262-certified IP such as the Tensilica Vision Q7 DSP is critical when designing automotive-grade solutions,” said Dave Grannan, CEO of Light.

Market research firm IC Insights expects semiconductor sales to grow 11% to a record-high $680.6 billion, adding to the 25% growth seen in 2021. Both the IC and OSD markets are predicted to see around 11% growth. The company also reported that the value of semiconductor content in electronic systems reached 33.2% last year, a new record.

Memory & storage
Samsung Electronics and Samsung Advanced Institute of Technology demonstrated in-memory computing based on MRAM in a new paper. To address the problem of small resistances of individual MRAM devices, they replaced the ‘current-sum’ in-memory computing architecture with a new ‘resistance sum’ in-memory computing architecture. In tests of the chip’s performance, it achieved an accuracy of 98% in classification of hand-written digits and a 93% accuracy in detecting faces from scenes. “In-memory computing draws similarity to the brain in the sense that in the brain, computing also occurs within the network of biological memories, or synapses, the points where neurons touch one another,” said Dr. Seungchul Jung of Samsung. “In fact, while the computing performed by our MRAM network for now has a different purpose from the computing performed by the brain, such solid-state memory network may in the future be used as a platform to mimic the brain by modeling the brain’s synapse connectivity.”

Lancaster University and University of Warwick researchers implemented UltraRAM on silicon. The new memory combines the non-volatility of a data storage memory, like flash, with the speed, energy-efficiency, and endurance of a working memory, like DRAM, through the use of compound semiconductors. They said that the UltraRAM on silicon demonstrated extrapolated data storage times of at least 1000 years, fast switching speed for device size, and program-erase cycling endurance of at least 10 million. “UltraRAM on silicon is a huge advance for our research, overcoming very significant materials challenges of large crystalline lattice mismatch, the change from elemental to compound semiconductor and differences in thermal contraction,” said Professor Manus Hayne of the Department of Physics at Lancaster.

Micron started shipping its 176-layer QLC NAND SSD. It uses a replacement-gate architecture that combines charge trap with a CMOS-under-array design. The company said it provides 33% higher I/O speed and 24% lower read latency than its previous generation solution. It covers client to data center applications.

Power devices
Infineon debuted the new generation of its OptiMOS Source-Down (SD) power MOSFETs. They are available in a PQFN 3.3 x 3.3 mm 2 package and a wide voltage class ranging from 25 V up to 100 V. The company said that the latest Source-Down package technology enables a larger silicon die in the same package outline compared to Drain-Down, and losses contributed by the package can be reduced. Additionally, heat is dissipated directly into the PCB through a thermal pad instead of over the bond wire or the copper clip. The PQFN addresses applications including motor drives, SMPS for server and telecom and OR-ing, as well as battery management systems.

The Institute of Microelectronics (IME) at the Agency for Science, Technology and Research (A*STAR) and Soitec are teaming up to develop next-generation silicon carbide (SiC) devices to power electric vehicles and advanced high-voltage electronic devices. The research collaboration aims to develop SiC epitaxy and MOSFET fabrication processes and establish a benchmark for SiC power MOSFET devices fabricated on Smart Cut SiC substrates. “The collaboration paves the way for the development of advanced epitaxy solutions to produce higher quality SiC wafers with energy-efficient characteristics, given the exciting potential of this material. As the main beneficiaries of this new process, the semiconductor ecosystem in Singapore will be given the opportunity to validate the superior energy efficiency of the SiC wafers produced through our collaboration,” said Christophe Maleville, Chief Technology Officer and Senior Executive VP at Soitec.

Security
A new research center will be established at Worcester Polytechnic Institute (WPI) focused on the security of semiconductors and hardware critical to key innovation industries. A two-year, $2 million grant, managed by the Innovation Institute at the Massachusetts Technology Collaborative (MassTech), will develop the center. The state grant will fund the purchase of a new, high-sensitivity, high-resolution semiconductor failure analysis system to study integrated chip debugging and diagnosis for manufacturing secure semiconductors. The program will also focus on workforce training. “This new center will more closely connect academic research with industry leaders, a strategy that will help spur collaborations to drive meaningful security innovations for a critical sector, and WPI is proud to be a hub for this important work,” said Laurie Leshin, President of WPI. “The new center will also answer a need for cutting-edge facilities to train the future workforce while promoting equity and access to STEM education and careers – a diversity that can make the world better for everyone.” Along with WPI, the center will be supported by Northeastern University, UMass Amherst, Quinsigamond Community College, Analog Devices, Dell, General Dynamics, Google, Intrinsix, and MITRE.

Kyocera used Rambus RT-130 Root of Trust and AES-IP-38 AES Accelerator IP to meet Federal Information Processing Standards (FIPS) 140-2 Cryptographic Module Validation Program (CMVP) standards for its Evolution Series multifunction products (MFPs) and provide security for customer data.

Physics simulation
Siemens Digital Industries Software updated its Simcenter 3D physics simulation software, offering increased support for turbomachinery modeling, a dedicated drop test application for handheld devices, tightly integrated topology optimization with the NX Design environment, and a new, faster acoustic solution method.