Week In Review: Design, Low Power

Arteris IP acquires Semifore; new center to develop novel memory devices/circuits; Infineon sheds high-reliability DC-DC converter business; FP8; governments back quantum computing.


With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; and grand challenge applications that will demonstrate the new capabilities. “We will develop new frameworks and systems that make it possible to run large-scale applications orders of magnitude more efficiently. What took many weeks and the power of multiple power plants will now take just minutes to hours and much less power,” said Tajana Simunic-Rosing, a computer science professor at UC San Diego.

The National Science Foundation is funding the Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics (ASAP), which will look at improving energy efficiency and throughput of communications links in chips. Transporting data eats up the most energy in chips. ASAP will look at the full stack, splitting the work into three themes: materials discovery for electrical and optical interconnects, heterogeneous 3D integration, and highly energy-efficient circuits and architectures. ASAP will be an Industry-University Cooperative Research Center housed in the Holonyak Micro & Nanotechnology Lab, which is part of the University of Illinois Urbana-Champaign’s Grainger College of Engineering. The research center is consortium of members, in which companies and other organizations pay annual dues to belong to the center.

The U.S. National Science and Technology Council (NSTC) released its latest annual report detailing how government agencies plans to spend money to advance quantum technologies. It focuses on the areas of quantum sensing and metrology, computing, and networking, as well as efforts in using quantum technologies for foundational scientific research and deployment and infrastructure. The report provides a brief on the quantum R&D efforts underway in various agencies.

In other quantum news, the Israel Innovation Authority is forming a consortium with the aim of developing Israel’s quantum computing technologies with a three-year budget of approximately $32.5 million, focusing on trapped ion and superconductor quantum processor technologies. Quantum Delta NL awarded €5.3 million to 16 Dutch research projects across a broad range of quantum technologies. A consortium led by VTT Technical Research Centre of Finland was granted €19 million to implement Qu-Pilot, which will provide pilot fabrication services to  quantum technology companies with the aim of accelerating the lab-to-market path.

How do you run models more efficiently using less power, especially in critical applications like self-driving vehicles where latency becomes a matter of life or death? Eight-bit floating-point could hold an answer, but standards are in flux.


Arteris IP acquired Semifore, a provider of a register design solution for hardware-software interface design, verification, and documentation. “The SoC is not done until the software drivers run,” said Richard Weber, founder and CEO of Semifore. “The combination of Arteris and Semifore will provide the scale needed to further deploy our register management technology for hardware-software interface to benefit new and existing customers looking to accelerate SoC designs.”

Micross Components will acquire Infineon’s HiRel DC-DC converter business including its hybrid and custom board-based power products. The business focuses on high reliability devices for extreme environments and applications such as space, defense, and aerospace. The deal is expected to close in the first quarter of calendar year 2023.

Quantum computer developer IonQ acquired the assets of Entangled Networks, a startup focused on enabling computation across multiple distributed quantum processors.

Products & deals

Renesas Electronics introduced a new general-purpose low-power microcontroller (MCU) for 8-bit applications. It includes optimized peripheral functions and 4-8KB of code flash memory in package sizes ranging from 8 to 20 pins, with the smallest 8-pin device measuring 3 x 3 mm.

Intel debuted the fourth generation of its Xeon processors. The new offerings include processors optimized for high-performance, low-latency network and edge workloads with a scalable architecture that integrates CPU and built-in accelerators. For HPC, the company introduced its first x86-based processor with high bandwidth memory.

Chipletz selected a suite of Siemens’ EDA tools for the design and verification of its Smart Substrate technology, which facilitates the heterogeneous integration of multiple ICs in a single package.

Imagination Technologies and Synopsys announced Fusion QuickStart Implementation Kits (QIKs) optimized for the IMG CXT GPU. Imagination used the Synopsys Fusion QIKs to achieve the target performance on 5nm process technology, using seven partitions and a hierarchical flow.

Aethertek selected the Keysight Open RAN Studio solution to validate the end-to-end performance of its RF front-end modules and mmWave phase array antennas as critical components of its 5G mmWave O-RAN Radio Units.

Bluespec teamed up with Synopsys to provide reference methodologies for verification and hardware/software debug of RISC-V system designs with Bluespec RISC-V cores. The companies are initially providing a reference methodology and scripts for Synopsys VCS functional verification solution and the Verdi Debug System, and are working on additional reference methodologies for static, formal, portable stimulus and FPGA synthesis.

Real-Time Innovations (RTI) and Ansys integrated RTI Connext with Ansys SCADE and SCADE Display to enable engineers to design and test systems against real-world scenarios in highly-scalable digital environments before moving to production stages, including optimizing simulation and design of deterministic AI systems.

Cadence’s Tensilica HiFi DSP IP now supports Dolby Atmos for cars.

Adoption of RISC-V cores in heterogeneous SoCs and packages point to a growing acceptance that chips or chiplets based on an open-source instruction set architecture can be combined with silicon-proven cores from Arm, Synopsys (ARC), and Cadence (Tensilica Xtensa), and others, to create a relatively inexpensive and flexible customization option.

Research notes

Researchers from the Lawrence Berkeley National Laboratory investigated how energy is transferred between layers of 2D semiconductor materials tungsten diselenide (WSe2) and tungsten disulfide (WS2). Although the layers aren’t tightly bonded to one another, electrons provide a bridge between them that facilitates rapid heat transfer, the researchers found. They propose applying it in an ultrafast thermometer with atomic precision.

Researchers from the University of Massachusetts Amherst found a low-cost way to harvest the waste energy from Visible Light Communication, which uses flashes of light to transmit information, by using the human body as an antenna. They say the waste energy can be recycled to power an array of wearable devices.

High-speed, high-bandwidth wireless communication at the terahertz frequency is possible across long distances, according to researchers from Northeastern University, NASA, the U.S. Air Force, and Amazon. The team was able to form a 2-kilometer link by removing the mixer from the stack that makes up a communication radio and pre-distorting the signal fed into the source.

Upcoming events

Check out upcoming events and webinars. Some on the horizon:

  • Jan. 16-Jan. 19, Asia & South Pacific Design Automation Conference, Tokyo, Japan
  • Jan. 23-Jan. 27, Florida Semiconductor Week, Gainesville, FL
  • Jan. 24-Jan. 26, Chiplet Summit, San Jose, CA
  • Jan. 28-Feb. 2, SPIE Photonics West, San Francisco, CA
  • Jan. 30-Feb. 1, AR/VR/MR: SPIE event focused on augmented, virtual and mixed reality, San Francisco, CA
  • Feb. 23, Phil Kaufman Award Ceremony and Banquet, San Jose, CA

Further reading

Check out the latest Low Power-High Performance and  Systems & Design newsletters for these highlights and more:

  • The potential of FP8 for AI
  • Importance of choosing the right memory at the edge
  • Why existing tools and methodologies are stretched to the breaking point
  • IP reuse as a result of system complexity
  • A look back at 2022

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