Software Driven Test Of FPGA Prototype


Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. At the same time, these designs are not purely hardware, but these days incorporate a significa... » read more

The Great Machine Learning Race


Processor makers, tools vendors, and packaging houses are racing to position themselves for a role in machine learning, despite the fact that no one is quite sure which architecture is best for this technology or what ultimately will be successful. Rather than dampen investments, the uncertainty is fueling a frenzy. Money is pouring in from all sides. According to a new Moor Insights report,... » read more

Embedded FPGAs Come Of Age


FPGAs increasingly are being viewed as a critical component in heterogeneous designs, ratcheting up their stature and the amount of attention being given to programmable devices. Once relegated to test chips that ultimately would be replaced by lower-power and higher-performance ASICs if volumes were sufficient, FPGAs have come a long way. Over the last 20 years programmable devices have mov... » read more

Advanced ASICs Are A Team Sport


The recent Super Bowl proved that a team with conviction and focus can do anything. This notion comes in handy when you think about the nearly impossible job of designing and manufacturing an advanced ASIC – in finFET technologies, with an interposer, multiple die, and never-before-proven throughput rates. For these kind of advanced technologies, it does take a village. What works is open, tr... » read more

The Battle To Embed The FPGA


There have been many attempts to embed an [gettech id="31071" comment="FPGA"] into chips in the past, but the market has failed to materialize—or the solutions have failed to inspire. An early example was [getentity id="22924" comment="Triscend"], founded in 1997 and acquired by [getentity id="22839" e_name="Xilinx"] in 2004. It integrated a CPU—which varied from an [getentity id="22186" co... » read more

Executive Insight: Jack Harding


[getperson id="11145" comment="Jack Harding"], president and CEO of [getentity id="22242" e_name="eSilicon"], sat down with Semiconductor Engineering to talk about consolidation, business relationships, what it will take to survive in the IoT age, and how to better optimize chips. What follows are excerpts of that conversation. SE: We’ve been looking at consolidation for a while and all th... » read more

CPU, GPU, or FPGA?


Nvidia’s new GeForce GTX 1080 gaming graphics card is a piece of work. Employing the company’s Pascal architecture and featuring chips made with a 16nm [getkc id="185" kc_name="finFET"] process, the GTX 1080’s GP104 graphics processing units boast 7.2 billion transistors, running at 1.6 GHz, and it can be overclocked to 1.733 GHz. The die size is 314 mm², 21% smaller than its GeForce ... » read more

2.5D Becomes A Reality


Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Have Margins Outlived Their Usefulness?


To automate the process of solving complex design problems, the traditional approach has been to partition them into smaller, manageable tasks. For each task, we have built the best possible solution which we continuously refine over time. Additionally, we have managed the interdependencies between tasks by defining boundaries or margins; these often have been best- and worst-case values used t... » read more

Reprogrammable, Reprogrammable, Reprogrammable


By Alex Grove I like FPGAs. My first experience with an FPGA was my university final year project where I demonstrated BIST with four Xilinx© 3000 devices; this was before FPGAs had JTAG built in. Filling up these devices with ViewDraw schematics required many hours in front of a terminal. Fast track to today’s advances such as Xilinx UltraScale and Vivado HLx, and I hope you would agree ... » read more

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