tag: Germanium

What’s Next For Transistors
By Mark LaPedus - 23 Jan, 2017 - Comments: 1

The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced packaging schemes. On top of that, post-CMOS devices, neuromorphic chips and quantum computing are all in the works. Semiconductor Engineering sat down to discuss these technologies with Marie Semeri... » read more

One-On-One: Dave Hemker
By Ed Sperling - 19 May, 2016 - Comments: 0

Dave Hemker, CTO at [getentity id="22820" comment="Lam Research"], sat down with Semiconductor Engineering to look at some of the key issues on the process and manufacturing side, and some of the key developments that will reshape the semiconductor industry in the future. What follows are excerpts of that conversation. SE: One of the big discussion topics these days is [getkc id="208" commen... » read more

7nm Fab Challenges
By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Power/Performance Bits: Nov. 3
By Jesse Allen - 03 Nov, 2015 - Comments: 0

Lithium-air batteries gain ground Scientists at the University of Cambridge have developed a working laboratory demonstration of a lithium-oxygen battery which has very high energy density, is more than 90% efficient, and can be recharged more than 2000 times. Their demonstrator relies on a highly porous, 'fluffy' carbon electrode made from graphene (comprising one-atom-thick sheets of ca... » read more

Manufacturing Of Next-Generation Channel Materials
By Michael Watts - 05 Oct, 2015 - Comments: 0

One of the many challenges for the IC developers is to change the channel material to increase transistor mobility. But what about manufacturing? Can LED-style epitaxy be migrated to high-volume silicon manufacturing? “The use of Ge and InGaAs quantum wells is an extension of the current strained Si strategy," said Aaron Thean, vice president of process technologies and director of the log... » read more

What Works After 7nm?
By Mark LaPedus - 20 Aug, 2015 - Comments: 3

An Steegen, senior vice president of process technology at [getentity id="22217" e_name="Imec"], the Belgium-based R&D organization, sat down with Semiconductor Engineering to discuss the future of process technology and transistor trends all the way to 3nm. SE: Some say the semiconductor industry is maturing. Yet we have more device types and options than ever before, right? Steegen:... » read more

Still Waiting For III-V Chips
By Mark LaPedus - 19 Feb, 2015 - Comments: 0

For years, chipmakers have been searching for an alternative material to replace traditional silicon in the channel for advanced CMOS devices at 7nm and beyond. There’s a good reason, too: At 7nm, silicon will likely run out of steam in the channel. Until recently, chipmakers were counting on III-V materials for the channels, at least for NFET. Compared to silicon, III-V materials provide ... » read more

Next Channel Materials?
By Mark LaPedus - 22 Jan, 2015 - Comments: 0

Chipmakers are making a giant leap from planar transistors to [getkc id="185" kc_name="finFETs"]. Initially, [getentity id="22846" e_name="Intel"] moved into finFET production at 22nm and is now ramping up its second-generation finFETs at 14nm. And the other foundries will enter the finFET fray at 16nm/14nm. So what’s next? Chipmakers will likely extend the finFET architecture to both 10nm... » read more

One-On-One: Aaron Thean
By Mark LaPedus - 22 Jan, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss process technology, transistor trends and other topics with Aaron Thean, vice president of process technologies and director of the logic devices R&D program at Imec. SE: Chipmakers are ramping up the 16nm/14nm logic node, with 10nm and 7nm in R&D. What’s the current timeline for 10nm and 7nm? Thean: 10nm is on its way. We will see r... » read more

Unraveling The Mysteries At IEDM
By Mark LaPedus - 19 Dec, 2014 - Comments: 0

In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

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