tag: PCRAM

CXL and OMI: Competing or Complementary?
By Bryon Moyer - 23 Mar, 2022 - Comments: 1

System designers are looking at any ideas they can find to increase memory bandwidth and capacity, focusing on everything from improvements in memory to new types of memory. But higher-level architectural changes can help to fulfill both needs, even as memory types are abstracted away from CPUs. Two new protocols are helping to make this possible, CXL and OMI. But there is a looming question... » read more

More Errors, More Correction in Memories
By Bryon Moyer - 09 Nov, 2021 - Comments: 1

As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to account for and correct bit errors, but as more sophisticated error-correction codes (ECC) are used, it requires more silicon area, which in turn drives up the cost. Given this trend, the looming question is whether the cost of ... » read more

New Memories Add New Faults
By Bryon Moyer - 07 Sep, 2021 - Comments: 1

New non-volatile memories (NVM) bring new opportunities for changing how we use memory in systems-on-chip (SoCs), but they also add new challenges for making sure they will work as expected. These new memory types – primarily MRAM and ReRAM – rely on unique physical phenomena for storing data. That means that new test sequences and fault models may be needed before they can be released t... » read more

What Happened To Execute-in-Place?
By Bryon Moyer - 25 Aug, 2020 - Comments: 0

Executing code directly from non-volatile memory, where it is stored, greatly simplifies compute architectures — especially for simple embedded devices like microcontrollers (MCUs). However, the divergence of memory and logic processes has made that nearly impossible today. The term “execute-in-place,” or ”XIP,” originated with the embedded NOR memory in MCUs that made XIP viable. ... » read more

Design And Measurement Requirements For Short Flow Test Arrays To Characterize Emerging Memories
By PDF Solutions - 07 Jul, 2020 - Comments: 0

Emerging non-volatile memories are becoming increasingly attractive for embedded and storage-class applications. Among the development challenges of Back-End integrated memory cells are long learning cycle and high wafer cost. We propose a short-flow based characterization of Memory Arrays using a Cross Point Array approach. A detail analysis of design requirements and testability confirms feas... » read more

Challenges In Stacking, Shrinking And Inspecting Next-Gen Chips
By Ed Sperling and Mark LaPedus - 21 May, 2020 - Comments: 0

Rick Gottscho, CTO of Lam Research, sat down with Semiconductor Engineering to discuss memory and equipment scaling, new market demands, and changes in manufacturing being driven by cost, new technologies, and the application of machine learning. What follows are excerpts of that conversation. SE: We have a lot of different memory technologies coming to market. What's the impact of that? ... » read more

NVM Reliability Challenges And Tradeoffs
By Bryon Moyer - 13 Apr, 2020 - Comments: 0

This second of two parts looks at different memories and possible solutions. Part one can be found here. While various NVM technologies, such as PCRAM, MRAM, ReRAM and NRAM share similar high-level traits, their physical renderings are quite different. That provides each with its own set of challenges and solutions. PCRAM has had a fraught history. Initially released by Samsung, Micron, a... » read more

Scaling Up Compute-In-Memory Accelerators
By Katherine Derbyshire - 19 Mar, 2020 - Comments: 3

Researchers are zeroing in on new architectures to boost performance by limiting the movement of data in a device, but this is proving to be much harder than it appears. The argument for memory-based computation is familiar by now. Many important computational workloads involve repetitive operations on large datasets. Moving data from memory to the processing unit and back — the so-called ... » read more

Taming Novel NVM Non-Determinism
By Bryon Moyer - 10 Mar, 2020 - Comments: 1

New memory technologies may have non-deterministic characteristics that add calibration to the test burden — and may require recalibration during their lifetime. Many of these memories are in development as a result of the search for a storage-class memory (SCM) technology that can bridge the gap between larger, slower memories like flash and faster DRAM memory. There are several approache... » read more

Battling Persistent Hacks At The Flash Level
By Bryon Moyer - 05 Mar, 2020 - Comments: 0

Hardware vendors are beginning to close up security vulnerabilities across a broader range of technology than in the past, a sign that they are taking potential hardware breaches much more seriously. Awareness of security flaws has been growing since the introduction of Meltdown, Spectre and Foreshadow, and more recently, the Cable Haunt attack. The general conclusion among chipmakers is tha... » read more

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