The Week In Review: Manufacturing


Manufacturing There are more changes at SEMI. SEMI has named David Anderson as president of the SEMI Americas region. Most recently, Anderson was chief executive and chairman of Novati, a specialty manufacturing fab. He replaces Karen Savala, who was president of the SEMI Americas region for six years. In an e-mail, Savala confirmed she left SEMI in October. Meanwhile, in October, SEMI an... » read more

GlobalFoundries Rolls Out 12nm FD-SOI Process


GlobalFoundries uncorked its 12FDX platform, incorporating a 12nm fully-depleted silicon-on-insulator process technology. The foundry’s Fab 1 in Dresden, Germany, will support customer development with the 12nm process, with product tape-outs scheduled for the first six months of 2019. The 12FDX technology follows the company’s 22FDX platform involving a 22-nanometer process. The foundr... » read more

Focus Shifts To Architectures


Chipmakers increasingly are relying on architectural and micro-architectural changes as the best hope for improving power and performance across a spectrum of markets, process nodes and price points. While discussion about the death of [getkc id="74" comment="Moore's Law"] predates the 1-micron process node, there is no question that it is getting harder for even the largest chipmakers to st... » read more

What’s Important For IoT—Power, Performance Or Integration?


Semiconductor Engineering sat down with Steve Hardin, director of product development for AT&T's IoT Solutions Group; Wayne Dai, CEO of VeriSilicon; John Koeter, vice president of the Solutions Group at [getentity id="22035" e_name="Synopsys"]; and Rajeev Rajan, vice president for IoT at [getentity id="22819" comment="GlobalFoundries"]. What follows are excerpts of that conversation. To vie... » read more

What’s Important For IoT—Power, Performance Or Integration?


Semiconductor Engineering sat down with Steve Hardin, director of product development for AT&T's IoT Solutions Group; Wayne Dai, CEO of VeriSilicon; John Koeter, vice president of the Solutions Group at [getentity id="22035" e_name="Synopsys"]; and Rajeev Rajan, vice president for IoT at [getentity id="22819" comment="GlobalFoundries"]. What follows are excerpts of that conversation. SE:... » read more

The Week In Review: Design/IoT


EDA & IP EDA revenues increased 7.1% for Q3 2015, according to the EDA Consortium, upping the number to $1957.5 million, compared to $1828.1 million in Q3 2014. The four-quarters moving average also jumped by 8.8%. IC Physical Design & Verification saw the biggest gains, with a 14% increase compared to Q3 2014 and $407.9 million in revenue for the quarter. IP was runner up, with $652... » read more

The Week In Review: Manufacturing


Looking to propel the next wave of OLED displays, Applied Materials has rolled out two new systems. The tools enable the volume production of OLED displays for both mobile products and TVs. In addition, Applied Materials has shipped an Applied TopMet roll-to-roll metal deposition system to Jindal Poly Films, a leader in PET and BOPP films for flexible packaging and labeling applications. In... » read more

The Week In Review: Design/IoT


M&A Continuing to seek economies of scale in the IP industry, VeriSilicon and Vivante are combining forces. "This transaction creates an extensive semiconductor IP portfolio that will now include GPU cores, vision image processors, digital signal processors, video codecs, mixed signal IP and foundry foundation IP," said Wayne Dai, VeriSilicon chairman, president and CEO. The merged compa... » read more

How Hard Is FD-SOI Design?


Fully-depleted silicon-on-insulator ([getkc id="220" kc_name="FD-SOI"]) manufacturing technology reached of point of readiness for mass production at the end of March. Along with that, it’s now clear that while there are some impacts on the design flow, those impacts are not game changers. For one thing, the tools required are the same ones currently used for 28nm planar bulk CMOS. The onl... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

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