Baya Systems: Moving Data Faster


Moving data is one of the big challenges in the AI world. There is so much data being generated that even moving it back and forth from processors to memories requires a significant amount of power, enormous bandwidth, and frequently causes delays that can bog down performance. Now, with substantially more processing, different types of processors on each system on chip (SoC), and the emerging ... » read more

Chip Industry Technical Paper Roundup: June 17


New technical papers recently added to Semiconductor Engineering’s library: [table id=440 /] Find more semiconductor research papers here.   » read more

Research Bits: June 17


Superlattice castellated FETs Researchers from the University of Bristol and Northrop Grumman Mission Systems discovered a latch-effect in gallium nitride (GaN) that could lead to improved radio frequency device performance, crucial for enabling 6G devices. “We have piloted a device technology, working with collaborators, called superlattice castellated field effect transistors (SLCFETs),... » read more

HBM Roadmap: Next-Gen High-Bandwidth Memory Architectures (KAIST’s TERALAB)


A new technical paper titled "HBM Roadmap Ver 1.7 Workshop" was published by researchers at KAIST’s TERALAB. The 371-page paper provides an overview of next-generation HBM architectures based on current technology trends, as well as many technology insights. Find the technical paper here or here.  Published June 2025. Advising Professor : Prof. Joungho Kim. Fig. 1: Thermal Manag... » read more

The Impact Of Parameter Uncertainties On The Lifetime Prediction of Power Devices (TU Delft)


A new technical paper titled "Impact of Parameter Uncertainties on Power Electronic Device Lifetime Predictions" was published by researchers at TU Delft. Abstract "Properly addressing uncertainties in reliability analysis is essential for realistic lifetime predictions of power devices. This paper investigates parameter uncertainties on the lifetime estimation of power devices using an emp... » read more

LLMs On The Edge


Nearly all the data input for AI so far has been text, but that's about to change. In the future, that input likely will include video, voice, as well as other types of data, causing a massive increase in the amount of data that needs to be modeled and the compute resources necessary to make it all work. This is hard enough in hyperscale data centers, which are sprouting up everywhere to handle... » read more

Photomask Changes And Challenges At Mature And Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to discuss the current state and future direction of mask-making, with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation.... » read more

TSMC: King Of Data Center AI


Large language models (LLMs like ChatGPT) are driving the rapid expansion of data center AI capacity and performance. More capable LLM models drive demand and need more compute. AI data centers require GPUs/AI Accelerators, switches, CPUs, storage and DRAM. About half of semiconductors are consumed by AI data centers now. This percentage will be much higher by 2030. TSMC has essentially 1... » read more

A Guide To SDC-Based Timing Intent Verification With Questa One


As semiconductor designs continue to grow in complexity and timing margins become increasingly constrained, achieving predictable timing closure has evolved from a best practice into a critical requirement for first-pass silicon success. At the heart of this process lies the timing constraint file, i.e., the SDC (Synopsys Design Constraints), which defines the intended timing behavior of the de... » read more

Chip Industry Week in Review


The Chinese Academy of Sciences unveiled a fully automated processor chip design system, claiming the potential to accelerate semiconductor development and replace human programmers. Micron Technology plans to expand its U.S. investments to approximately $150 billion in domestic memory manufacturing and $50 billion in R&D, which is $30 billion higher than previously reported. AMD laun... » read more

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