State Of The Market For Edge Silicon


The explosion of data and the rapid ramp of AI is causing significant changes in how chips are architected. At the edge, the key metrics are power, latency, and performance, but those can vary significantly by application and by workload. Steve Roddy, chief marketing officer at Quadric, talks about the need to balance performance and efficiency with flexibility for different applications, what ... » read more

AI At The Edge Ubiquitous, Agentic, Multimodal, and Hardware-Accelerated


Over the past decade, cloud-based artificial intelligence (AI) has undergone significant maturation. Cloud-based AI now reliably supports large-scale model training, massive data storage, and centralized orchestration of AI workloads. At the same time, limitations—such as latency, bandwidth costs, privacy concerns, catastrophic consequences in the event of failure, and dependency on continuou... » read more

Engineer’s Guide to Simulating Electronics Cooling: eBook


Struggling with overheating PCBs, airflow bottlenecks, or long thermal simulation runtimes? As power densities rise and form factors shrink, electronics cooling is no longer a late-stage check — it’s a core design requirement. Poor thermal performance leads to hotspots, reduced reliability, field failures, and costly redesigns. Learn how to use intelligent thermal simulation to predic... » read more

Inside the AI Accelerator: Essential IP Design Solutions: eBook


This eBook explores how next‑gen AI accelerators break past single‑chip limits using advanced IP, high‑speed interconnects, memory interfaces, and multi‑die architectures. You’ll see how optical links push bandwidth further and how built‑in security IP keeps AI data protected without slowing performance. What you'll learn: How UALink, PCIe, CXL, and Ultra Ethernet enable sca... » read more

Blog Review: Apr. 8


Cadence's Shyam Sharma highlights new capabilities in LPDDR6, including metadata built into the data packets, rowhammer mitigations, DVFS with support for three operating voltage rails, and new efficiency modes. Synopsys' Akanksha Soni points to multiphysics simulation as a key element of ensuring automotive IC designs meet ISO 26262 requirements. Siemens' John McMillan suggests a simulat... » read more

The Specialty Device Surge Part 2: The Process Control Challenges Of MEMS, Co-Packaged Optics, And More


In a world where high-bandwidth memory, GPUs, and advanced AI packages are all the rage, it is easy to forget the important role specialty devices play. These unsung heroes of modern life perform critical functions across a wide range of industries, including automotive, telecommunications, data centers, emerging AI hardware ecosystems, and consumer electronics, just like the smartphone in your... » read more

Breaking The Legacy Trap: How Semiconductor Executives Can Accelerate AI Adoption And Transform IT Applications At The Same Time


The semiconductor industry is facing a strategic paradox. AI has rapidly moved from experimental technology to a competitive necessity promising faster yield improvement, smarter supply chain decisions, and autonomous factory operations. Yet the very systems that semiconductor manufacturers depend on to run their fabs, manage their supply chains, and serve their customers were built for a diffe... » read more

Enhancing Silicon Reliability With In-System Test And SLM Data


Innovation in semiconductor development and manufacturing shows no signs of slowing down. Ever-larger chips at ever-smaller geometries create new challenges all the time. At the same time, competitive pressures are shrinking time to market (TTM) and putting enormous pressure on project teams. Furthermore, the wide use of electronics in safety-critical applications demands better reliability, av... » read more

AI data Center Providers Seek Power and Bandwidth Promise in CPO


Co-packaged optics (CPO), a high-speed networking technology that integrates optical components (lasers, photodetectors) directly with switch/compute chips (ASICs) in the same package, continues to show promise. Advocates of CPO maintain that it reduces power consumption by over 80% and increases bandwidth density by shortening electrical traces to millimeters. Used primarily in data cente... » read more

What’s Failing At The Interface


Key Takeaways The interface is where failures in advanced packaging become visible, but it's increasingly not where they originate. Weak interfaces often don't fail at time zero, but they do degrade due to parametric drift and margin erosion that binary test screens miss entirely. The temporary test interconnect is the largest variable in the measurement chain and must be controlled ... » read more

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