An Exploration of Agent Scaling for HLS Design Space Exploration (IBM)


A new technical paper, "Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?" was published by IBM. Abstract "We present an empirical study of how far general-purpose coding agents – without hardware-specific training – can optimize hardware designs from high-level algorithmic specifications. We introduce an agent factory, a ... » read more

Why Co-Packaged Optics Should be Viewed as an Architectural Commitment (UW-Madison, MIT et al.)


A new technical paper, "3D optoelectronics and co-packaged optics: when solving the wrong problems stalls deployment," by the University of Wisconsin, MIT, and Invictus Innovation EV Technology. Abstract "The rapid growth of AI and accelerator-driven workloads is forcing a fundamental rethinking of optical interconnect architectures in datacenters. Co-packaged optics and three-dimensional... » read more

CP-Based Lot Scheduling Solutions For a Semiconductor Manufacturing (Infineon, U. of Klagenfurt)


A new technical paper, "Quantifying the Global Impact of Constraint Programming Based Local Scheduling in Semiconductor Manufacturing," was published by Infineon and the University of Klagenfurt. Abstract "The efficiency of semiconductor frontend manufacturing highly depends on the optimization of resource allocation. In academic works, scheduling methods, i.e., based on Constraint Progra... » read more

Research Bits: Mar. 31


2D hard mask material Researchers from Penn State University and University of Chemistry and Technology Prague propose using the 2D material chromium oxychloride (CrOCl) as a hard mask, because its layered structure is resistant to plasma etching and enables it to be an effective mask at smaller thicknesses. “This 2D material is like lasagna. It’s a layer-by-layer structure,” said Zih... » read more

Chip Industry Technical Paper Roundup: Mar. 31


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations DiscoRD: An Experimental Methodology for Quickly Discovering the Reliable Read Disturbance Threshold of Real DRAM Chips 🔗 ETH Zurich, Rutgers University Performance Analysis of Edge and In-Sensor AI Processors: A Comparative Review 🔗 Univ... » read more

Simulations of Silicon Spin Qubits Based on a GAAFET (Teikyo U., Riken)


A new technical paper, "Device/circuit simulations of silicon spin qubits based on a gate-all-around transistor," was published by Teikyo University and RIKEN. Abstract "We theoretically investigated the readout process of a spin–qubit structure based on a gate-all-around (GAA) transistor. Our study focuses on a logical qubit composed of two physical qubits. Different spin configuration... » read more

Challenges In Scaling Chips To 2nm And Below


Key Takeaways Scaling to 2nm and below continues due to power improvements per watt, but progress is much more challenging and costly. Solutions to problems often create other problems due to less margin for tradeoffs, often requiring larger interposers, more chiplets, and more complex packages. New levels of precision are required throughout the design-through-manufacturing flow, re... » read more

All Software Is Hardware-Dependent


I was lucky in my early career that I found two sets of great mentors. The first happened recently after graduating when I joined the Hilo development team. Members of that team included Phil Moorby, Simon Davdimann, Peter Flake, and others. They all had very different coding personalities, but most importantly, they worked as a team and used good foundational processes. One outcome of that ... » read more

Integrating Error Propagation Theory Into the FMEDA Framework (Robert Bosch GmbH)


A new technical paper, "Quantifying Uncertainty in FMEDA Safety Metrics: An Error Propagation Approach for Enhanced ASIC Verification," was published by Robert Bosch GmbH. Abstract "Accurate and reliable safety metrics are paramount for functional safety verification of ASICs in automotive systems. Traditional FMEDA (Failure Modes, Effects, and Diagnostic Analysis) metrics, such as SPFM (... » read more

In-Depth Analysis of 187 Publications on Hardware Reverse Engineering (Ruhr U., MPI)


A new technical paper, "SoK: From Silicon to Netlist and Beyond Two Decades of Hardware Reverse Engineering Research," was published by the Ruhr University Bochum and the Max Planck Institute for Security and Privacy. Abstract "As hardware serves as the root of trust in modern computing systems, Hardware Reverse Engineering (HRE) is foundational for security assurance. In practice, HRE en... » read more

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