Tool Matching Getting Tougher Across Test & Metrology


Key Takeaways Engineers leverage both device-specific and tool-level data to identify a process "sweet spot." Tight, frequent tool-to-tool matching enables greater yield and fab flexibility. Machine learning helps capture the nuances of a tool's signature. Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer sca... » read more

Encapsulating Wearable Sensors Using A Pre-Mixed Two-Part Epoxy


By Anthony Buzzerio, Venkat Nandivada, and Rohit Ramnath The growing field of wearable medical technology relies heavily on miniaturized sensors capable of providing accurate and continuous physiological data. Ensuring the long-term reliability and performance of these sensors — often subjected to demanding conditions including physical stress, thermal fluctuations, and exposure to bodily ... » read more

Automated Measurement Recipes for Photothermal AFM‑IR


Recipe‑based automation for atomic force microscopy (AFM) workflows ensures consistent, repeatable data acquisition, reduces operator dependency, and streamlines complex measurement routines. Bruker’s AutoMET automation software, widely adopted for conventional AFM characterization, now also brings automation to nanoscale IR (nanoIR) spectroscopy and imaging. AutoMET provides except... » read more

Addressing Semiconductor Cybersecurity Challenges through Robust Industry Standards and Globally Secure Frameworks


This presentation addresses critical cybersecurity challenges in semiconductor manufacturing by outlining current industry standards (SEMI E187, E188, E191) and their implementation through SMCC workgroups. It identifies key gaps in existing frameworks—particularly the inadequacy of current equipment connectivity standards for distributed collaboration and the scalability challenge of custom ... » read more

Digital Twins: The Cloud’s The Limit


Key Takeaways Digital twins are gaining traction as a way of testing different options at every step of the design-through-manufacturing flow. AI can be used to glue together disparate data types in multi-physics simulations. The promise of digital twins is huge, but multiple challenges need to be solved before it can live up to its potential. Digital twin technology is draw... » read more

Wafer-on-Wafer Hybrid Bonding: Reticle Placements To Achieve Efficient NW Topologies (ETH Zurich)


Researchers from ETH Zurich published the new technical paper "Network Design for Wafer-Scale Systems with Wafer-on-Wafer Hybrid Bonding." Abstract "Transformer-based large language models are increasingly constrained by data movement as communication bandwidth drops sharply beyond the chip boundary. Wafer-scale integration using wafer-on-wafer hybrid bonding alleviates this limitation by p... » read more

A Framework That Generates Chip Layouts Directly From Natural Language Specifications (U. of Bristol, RAL)


A new technical paper, "NL2GDS: LLM-aided interface for Open Source Chip Design," was published by researchers at University of Bristol and Rutherford Appleton Laboratory. Abstract "The growing complexity of hardware design and the widening gap between high-level specifications and register-transfer level (RTL) implementation hinder rapid prototyping and system design. We introduce NL2GDS (... » read more

Unified, Traceable Framework For Risk Assessment in Automotive Semiconductors (Robert Bosch)


A new technical paper, "An Integrated Failure and Threat Mode and Effect Analysis (FTMEA) Framework with Quantified Cross-Domain Correlation Factors for Automotive Semiconductors," was published by researchers at Robert Bosch GmbH. Abstract "The automotive industry faces increasing challenges in ensuring both functional safety (FuSa) and cybersecurity for complex semiconductor devices. Tr... » read more

Research Bits: Mar. 9


Low noise clock generator Researchers from Ulsan National Institute of Science and Technology (UNIST) designed a low power semiconductor circuit capable of generating high-quality clock signals with significantly reduced noise levels. The injection-locked clock multiplier (ILCM) circuit uses a simplified design based on a ring voltage-controlled oscillator (VCO). It integrates a frequency t... » read more

Chip Industry Technical Paper Roundup: Mar. 9


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption 🔗 Boston University, Northeastern University, KAIST, University of Murcia Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler ... » read more

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