GPU for FHE; heterogeneous memory design; formal verification; oxide semiconductors for memory; edge agent deployments; RPU; AI hardware roadmap; in-memory computing accelerators.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption 🔗 |
Boston University, Northeastern University, KAIST, University of Murcia |
| Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler 🔗 |
Stanford University, UCSC |
| Linear Formal Verification of Sequential Circuits using Weighted-AIGs 🔗 |
University of Bremen |
| Oxide Semiconductor Gain Cell-Embedded Memory: Materials and Integration Strategies for Next Generation On-Chip Memory 🔗 |
Seoul National University, KAIST |
| Systems-Level Attack Surface of Edge Agent Deployments on IoT 🔗 |
Imperial College London |
| RPU — A Reasoning Processing Unit 🔗 |
Harvard University |
| AI+HW 2035: Shaping the Next Decade 🔗 |
UIUC, UCLA, Stanford University |
| Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators 🔗 |
KAUST, Compumacy |
Find more semiconductor research papers here.
Leave a Reply