tag: University of California Los Angeles

Enabling Scalable Accelerator Design On Distributed HBM-FPGAs (UCLA)
By Technical Paper Link - 06 Dec, 2023 - Comments: 0

A technical paper titled “TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs” was published by researchers at University of California Los Angeles. Abstract: "Despite the increasing adoption of Field-Programmable Gate Arrays (FPGAs) in compute clouds, there remains a significant gap in programming tools and abstractions which can leverage network-connected, cloud-scale... » read more

Research Bits: December 5
By Jesse Allen - 05 Dec, 2023 - Comments: 0

Neuromorphic nanowires Researchers from UCLA and University of Sydney built an experimental computing system physically modeled after the biological brain. The device is composed of a tangled-up network of wires containing silver and selenium that were allowed to self-organize into a network of entangled nanowires on top of an array of 16 electrodes. The nanowire network physically reconfigure... » read more

Technical Paper Roundup: November 21
By Liz Allan - 21 Nov, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=167 /] More Reading Technical Paper Library home » read more

Neuromorphic Devices Based On Memristive Nanowire Networks
By Technical Paper Link - 16 Nov, 2023 - Comments: 0

A technical paper titled “Online dynamical learning and sequence memory with neuromorphic nanowire networks” was published by researchers at University of Sydney, University of California Los Angeles (UCLA), National Institute for Materials Science (NIMS), Kyushu Institute of Technology (Kyutech), and University of Sydney Nano Institute. Abstract: "Nanowire Networks (NWNs) belong to an em... » read more

Research Bits: November 14
By Jesse Allen - 14 Nov, 2023 - Comments: 0

Solid-state thermal transistor for heat management Researchers from University of California Los Angeles created a stable and fully solid-state thermal transistor that uses an electric field to control a semiconductor device’s heat movement. It is compatible with integrated circuits in semiconductor manufacturing processes. The team’s design incorporates the field effect on charge dynamics... » read more

Chip Industry’s Technical Paper Roundup: November 6
By Liz Allan - 06 Nov, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=162 /] More Reading Technical Paper Library home » read more

Light-Matter Interaction In Van Der Waals Nanophotonic Devices
By Technical Paper Link - 31 Oct, 2023 - Comments: 0

A technical paper titled “Deeply subwavelength integrated excitonic van der Waals nanophotonics” was published by researchers at University of California Los Angeles, University of Washington Seattle, and Auburn University. Abstract: "The wave nature of light sets a fundamental diffraction limit that challenges confinement and control of light in nanoscale structures with dimensions signi... » read more

Research Bits: April 10
By Jesse Allen - 10 Apr, 2023 - Comments: 0

Meminductor identified Researchers at Texas A&M University identified the meminductor circuit unit. Similar to the memristor and the memcapacitor, a meminductor has a memory-like nature where its properties are dependent on previous values. The resistor, capacitor, and inductor comprise the three classical circuit elements. The memristor and the memcapacitor, while earlier theorized, ha... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Mar, 2022 - Comments: 0

Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

Power/Performance Bits: Jan. 3
By Jesse Allen - 03 Jan, 2022 - Comments: 0

Optical device integration Researchers from the University of Strathclyde, University of Glasgow, and the Australian National University propose a way to place multiple micron-scale optical devices made from different materials close together on a single silicon chip. “The development of electronics that are based on silicon transistors has enabled increasingly more powerful and flexible ... » read more

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