Achieving High-Performance, Low-Power Design Optimization With The Solido Library IP Solution
By Siemens EDA - 13 Dec, 2023 - Comments: 0

Achieving overall power, performance, and area (PPA) targets is a key goal for today’s advanced IC design projects. To accomplish this, standard cell and memory libraries must be optimized for PPA. In this white paper, we describe how the Siemens Solido IP Library Solution helps engineering teams design and verify library IP to optimize PPA tradeoffs, maximize yield, and validate for easy int... » read more

Blog Review: December 13
By Jesse Allen - 13 Dec, 2023 - Comments: 0

Synopsys' Charles Dittmer discusses key and emerging use cases for Bluetooth Low Energy and how combining BLE with other wireless protocols can open new avenues of functionality for application areas including automotive, hearables, and retail. Cadence's Neelabh Singh points out changes in the terminologies describing USB4 links and shows the various possible link configurations put forth by... » read more

The Uncertain Future Of In-Memory Compute
By Karen Heyman - 13 Dec, 2023 - Comments: 0

Experts at the Table — Part 2: Semiconductor Engineering sat down to talk about AI and the latest issues in SRAM with Tony Chan Carusone, chief technology officer at Alphawave Semi; Steve Roddy, chief marketing officer at Quadric; and Jongsin Yun, memory technologist at Siemens EDA. What follows are excerpts of that conversation. Part one of this conversation can be found here and part 3 is h... » read more

A Framework For Improving Current Defect Inspection Techniques For Advanced Nodes
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy” was published by researchers at Ghent University, imec, and SCREEN SPE. Abstract: "In semiconductor manufacturing, lithography has often been the manufacturing step defining the smallest possible pattern dimensions. In recent ... » read more

More Efficient Side-Channel Analysis By Applying Two Deep Feature Loss Functions
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Beyond the Last Layer: Deep Feature Loss Functions in Side-channel Analysis” was published by researchers at Nanyang Technological University, Radboud University, and Delft University of Technology. Abstract: "This paper provides a novel perspective on improving the efficiency of side-channel analysis by applying two deep feature loss functions: Soft Nearest Neig... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

2D Computing Magnets For Temperatures Up To 170-Degrees Fahrenheit
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Magnetic properties of intercalated quasi-2D Fe3-xGeTe2 van der Waals magnet” was published by researchers at University of Texas at El Paso, National Institute of Standards and Technology (NIST), University of Edinburgh, Donostia International Physics Centre (DIPC), Hampton University, and Brookhaven National Laboratory. Abstract: "Among several well-kno... » read more

Designing Low Power Radar Processors
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing” was published by researchers at University of California Irvine, University of Wisconsin-Madison, and TCS Research. Abstract: "In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communic... » read more

Testing ICs Faster, Sooner, And Better
By Laura Peters - 12 Dec, 2023 - Comments: 0

The infrastructure around semiconductor testing is changing as companies build systems capable of managing big data, utilizing real-time data streams and analysis to reduce escape rates on complex IC devices. At the heart of these tooling and operational changes is the need to solve infant mortality issues faster, and to catch latent failures before they become reliability problems in the fi... » read more

Closing The Test And Metrology Gap In 3D-IC Packages
By Gregory Haley - 12 Dec, 2023 - Comments: 0

The industry is investing in more precise and productive inspection and testing to enable advanced packages and eventually, 3D ICs. The next generations of aerospace, automotive, smartphone, and wearable tech most likely will be powered by multiple layers of intricately connected silicon, a stark departure from the planar landscapes of traditional integrated circuits. These 3D-ICs, compos... » read more

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