HBM3 Memory: Break Through to Greater Bandwidth


Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI/ML and other high-performance computing workloads. HBM3 as the latest generation of the standard raises data rates to 6.4 Gb/s and promises to scale even higher. The Rambus HBM3 controller provides industry-leading support of the extended roadmap for HBM3 with performance to 9.6... » read more

Using Keysight Design Data Management SOS In The Cloud


Integrated circuits (ICs) are becoming increasingly complex and resource intensive. This is challenging companies to design chips more efficiently and reduce the overall impact of peak processing loads. Companies typically use large server farms and high-performance storage systems to design and validate chips quickly and efficiently. However, this approach is very resource intensive. For ex... » read more

Achieving High-Performance, Low-Power Design Optimization With The Solido Library IP Solution


Achieving overall power, performance, and area (PPA) targets is a key goal for today’s advanced IC design projects. To accomplish this, standard cell and memory libraries must be optimized for PPA. In this white paper, we describe how the Siemens Solido IP Library Solution helps engineering teams design and verify library IP to optimize PPA tradeoffs, maximize yield, and validate for easy int... » read more

Blog Review: December 13


Synopsys' Charles Dittmer discusses key and emerging use cases for Bluetooth Low Energy and how combining BLE with other wireless protocols can open new avenues of functionality for application areas including automotive, hearables, and retail. Cadence's Neelabh Singh points out changes in the terminologies describing USB4 links and shows the various possible link configurations put forth by... » read more

The Uncertain Future Of In-Memory Compute


Experts at the Table — Part 2: Semiconductor Engineering sat down to talk about AI and the latest issues in SRAM with Tony Chan Carusone, chief technology officer at Alphawave Semi; Steve Roddy, chief marketing officer at Quadric; and Jongsin Yun, memory technologist at Siemens EDA. What follows are excerpts of that conversation. Part one of this conversation can be found here and part 3 is h... » read more

A Framework For Improving Current Defect Inspection Techniques For Advanced Nodes


A technical paper titled “Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy” was published by researchers at Ghent University, imec, and SCREEN SPE. Abstract: "In semiconductor manufacturing, lithography has often been the manufacturing step defining the smallest possible pattern dimensions. In recent ... » read more

More Efficient Side-Channel Analysis By Applying Two Deep Feature Loss Functions


A technical paper titled “Beyond the Last Layer: Deep Feature Loss Functions in Side-channel Analysis” was published by researchers at Nanyang Technological University, Radboud University, and Delft University of Technology. Abstract: "This paper provides a novel perspective on improving the efficiency of side-channel analysis by applying two deep feature loss functions: Soft Nearest Neig... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes


A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

2D Computing Magnets For Temperatures Up To 170-Degrees Fahrenheit


A technical paper titled “Magnetic properties of intercalated quasi-2D Fe3-xGeTe2 van der Waals magnet” was published by researchers at University of Texas at El Paso, National Institute of Standards and Technology (NIST), University of Edinburgh, Donostia International Physics Centre (DIPC), Hampton University, and Brookhaven National Laboratory. Abstract: "Among several well-kno... » read more

Designing Low Power Radar Processors


A technical paper titled “Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing” was published by researchers at University of California Irvine, University of Wisconsin-Madison, and TCS Research. Abstract: "In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communic... » read more

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