New Developments Set To Accelerate MIPI CSI-2 Adoption In Automotive


As Advanced Driver-Assistance Systems (ADAS) become more sophisticated, cars are equipped with an increasing number of cameras and sensors. To support features like automated parking, adaptive cruise control, and enhanced night vision, sensors source multiple wavelengths and deploy cameras with higher quality data formats, higher frame and refresh rates. ADAS systems are all powered by data sou... » read more

The Race Toward Quantum Advantage


Quantum computing has yet to show an advantage over conventional computing, but huge sums of money are betting it will. So far that hasn't happened. Early quantum computers were created in the mid-1990s after mathematicians had demonstrated the effectiveness of applying quantum approaches to some problems. At that stage they were simulated using conventional computing, but it started the rac... » read more

Your AI Chip Doesn’t Need An Expensive Insurance Policy


Imagine you are an architect designing a new SoC for an application that needs substantial machine learning inferencing horsepower. The team in marketing has given you a list of ML workloads and performance specs that you need to hit. The in-house designed NPU accelerator works well for these known workloads – things like MobileNet v2 and Resnet50. The accelerator speeds up 95+% of the comput... » read more

Jumping Over Thermal Cycles Accelerates Thermomechanical Fatigue Simulations


Although you are probably not aware of them, dozens of electronic control units (ECUs) — printed circuit boards (PCBs) in metal or plastic housings — exist in your car to control and monitor the operation and safety of your vehicle’s many control systems. These units must work for the lifetime of your car, during which time they are subjected to many heating and cooling cycles. The most o... » read more

LLM Technology For Chip Design


In the nine short months since OpenAI brought ChatGPT (a Chat Generative Pre-Trained Transformer) and the phenomenal concept of large language models (LLMs) to the global collective consciousness, pioneers from every corner of the economy have raced to understand the benefits—and the pitfalls—of deploying this nascent technology to their particular industry. And as it turns out, semicondu... » read more

Managing P/P Tradeoffs With Voltage Droop Gets Trickier


Experts at the Table: Semiconductor Engineering sat down to talk about voltage droop/IR drop with Bill Mullen, distinguished engineer at Ansys; Rajat Chaudhry, product management group director at Cadence; Heidi Barnes, senior applications engineer at Keysight Technologies; Venkatesh Santhanagopalan, product manager at Movellus; Joe Davis, senior director for Calibre interfaces and mPower EM/IR... » read more

Nginx Performance On AWS Graviton3


In this blog we explore the performance of a Nginx Reverse Proxy (RP) and API Gateway (APIGW) on AWS Graviton3-based instances. We will also refer to these collectively as RP/APIGW. We compared AWS Graviton3-based instances to Intel Xeon 'Ice Lake'-based instances and AWS Graviton2-based instances to demonstrate the leadership performance available with AWS Graviton3. Summary Compared to AWS ... » read more

SG2042 64-Core RISC-V CPU Versus Existing RISC-V HW And High Performance x86 CPUs


A technical paper titled “Is RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU” was published by researchers at University of Edinburgh. Abstract: "The Sophon SG2042 is the world's first commodity 64-core RISC-V CPU for high performance workloads and an important question is whether the SG2042 has the potential to encourage the HPC community to embrace RISC-... » read more

Formal Verification Of a Sequestered Encryption Architecture


A technical paper titled “Security Verification of Low-Trust Architectures” was published by researchers at Princeton University, University of Michigan, and Lafayette College. Abstract: "Low-trust architectures work on, from the viewpoint of software, always-encrypted data, and significantly reduce the amount of hardware trust to a small software-free enclave component. In this paper, we... » read more

DRAM Simulator For Evaluation of Memory System Design Changes (ETH Zurich)


A technical paper titled “Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator” was published by researchers at ETH Zurich. Abstract: "We present Ramulator 2.0, a highly modular and extensible DRAM simulator that enables rapid and agile implementation and evaluation of design changes in the memory controller and DRAM to meet the increasing research effort in improving the perfo... » read more

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