Chip Industry Week In Review
By The SE Staff - 13 Feb, 2026 - Comments: 0

Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

How Siemens Symphony Pro Enabled AnalogPort To Verify Complex Chip Interfaces
By Siemens EDA - 13 Feb, 2026 - Comments: 0

The semiconductor industry's shift toward chiplet-based architectures has created significant mixed-signal verification challenges for high-speed die-to-die interconnects. Traditional verification approaches force difficult trade-offs: Digital mixed-signal (DMS) flows sacrifice analog fidelity, while Analog mixed-signal (AMS) flows struggle with scalability and manual overhead. This paper detai... » read more

Automotive Week In Review
By The SE Staff - 13 Feb, 2026 - Comments: 0

Quick links: Automotive chips, Autonomous, EVs, Batteries, Policy, Research. Automotive chips  Mythic and Honda will jointly develop an automotive-grade AI SoC for Honda’s SDVs that leverages Mythic’s energy-efficient analog compute-in-memory technology. ST released a new MCU with AI acceleration for the automotive edge, integrating an embedded neural network accelerator. I... » read more

Formal Verification First: How AI Supports But Cannot Replace It
By Fabiana Muto - 13 Feb, 2026 - Comments: 0

At a recent VLSI-D panel, industry leaders explored one of the most pressing topics in silicon design today — the intersection of AI-powered EDA, which is revolutionizing chip design for tomorrow. Ashish Darbari, CEO of Axiomise, questioned the panelists on the role of AI in chip design, optimizing PPA, validation and verification. While the panel explored the role of AI in design implemen... » read more

IMC: Free-Space Optical Neural Network With High Clockrate (Berkeley, USC, TU Berlin)
By Technical Paper Link - 12 Feb, 2026 - Comments: 0

A new technical paper titled "High-clockrate free-space optical in-memory computing" was published by researchers at UC Berkeley, USC,  and TU Berlin. Abstract "The ability to process and act on data in real time is increasingly critical for applications ranging from autonomous vehicles, three-dimensional environmental sensing, and remote robotics. However, the deployment of deep neural ... » read more

AI Inference Needs A Mix-And-Match Memory Strategy
By Raj Uppala - 12 Feb, 2026 - Comments: 0

AI inference is no longer a single workload that can be served efficiently by a single type of accelerator or memory. From fast chat replies to 10M token codebases, inference spans wildly diverse workloads with very different limits on latency, bandwidth, capacity, and compute, as the figure below demonstrates.1 Source: Meta1 The AI inference spectrum of workloads includes: Inter... » read more

Formal Verification Fundamentals Remain Non-Negotiable In The New Verification Revolution
By Nicolae Tusinschi - 12 Feb, 2026 - Comments: 0

The semiconductor industry stands at a critical juncture. First-time silicon success rates have reached all-time lows, while design complexity continues to grow exponentially. System-on-chip designs now integrate billions of transistors, multiple processor cores, complex memory hierarchies, and sophisticated interconnect fabrics. In this environment, the stakes for verification accuracy have ne... » read more

Chiplets And 3D-ICs Add New Electrical And Mechanical Challenges
By Ann Mutschler - 12 Feb, 2026 - Comments: 1

Key Takeaways • Chiplets and 3D-IC architectures add new thermal-mechanical stresses that can affect the reliability of entire systems. • As chiplets are assembled into packages, defectivity targets become more stringent for each component in a system. • Traditional silos are breaking down, forcing design teams to address issues such as materials choices that previously were handled by... » read more

AI, GPU, And HPC Data Centers: The Infrastructure Behind Modern AI
By Vinod Khera - 12 Feb, 2026 - Comments: 0

Artificial intelligence (AI) is stretching compute infrastructure well beyond what traditional enterprise data centers were designed to handle. Modern AI training requires massively parallel compute, low-latency networking, high-throughput storage pipelines, and facility engineering that can safely support higher rack power densities than legacy environments. These demands are fueling the eme... » read more

UCIe’s Major Technical Components Are Now In Place
By Bryon Moyer - 12 Feb, 2026 - Comments: 0

Key Takeaways UCIe 3.0 doubles bandwidth and enhances manageability, addressing new use cases and following an annual update cycle since 2023. The growing demand for chiplet-based architectures in AI data centers is driven by the limitations of monolithic chips, making inter-chiplet communication and connectivity crucial. While UCIe was initially seen as feature-heavy, many of its ma... » read more

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