Power Semiconductors: A Deep Dive Into Materials, Manufacturing & Business


Whether you’re the owner of the average smartphone, commuting on trains, or driving around in a Tesla, you use power semiconductor devices every day. In a technology-dependent world, these devices are everywhere, and demand for more types of chips using different materials is growing. In the past, most engineers paid little attention to power semiconductors. They were deemed commodity, off... » read more

Week In Review: Semiconductor Manufacturing, Test


The U.S. Commerce Department outlined proposed rules for the Chips for America Incentives Program, including additional details on national security measures applicable to the CHIPS Incentives Program included in the CHIPS and Science Act. The rules limit funding recipients from investing in the expansion of semiconductor manufacturing in foreign countries of concern, notably the People’s Rep... » read more

Week In Review: Design, Low Power


Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to ch... » read more

Week In Review: Automotive, Security and Pervasive Computing


The Biden administration uncorked a fueling station locator tool to help consumers locate charging stations by fuel type, a plan to install 24,000 charging stations at federal facilities by next fiscal year, as well as other clean energy commitments. Source: Department of Energy: Alternative Fuels Data Center & Station Locator Europe is making progress on a plan that requires all ... » read more

Combination of AI Techniques To Find The Best Ways to Place Transistors on Silicon Chips


A new technical paper titled "AutoDMP: Automated DREAMPlace-based Macro Placement" was published by researchers at NVIDIA. Abstract: "Macro placement is a critical very large-scale integration (VLSI) physical design problem that significantly impacts the design power-performance-area (PPA) metrics. This paper proposes AutoDMP, a methodology that leverages DREAMPlace, a GPU-accelerated place... » read more

Covert Channel Between the CPU and An FPGA By Modulating The Usage of the Power Distribution Network


A new technical paper titled "CPU to FPGA Power Covert Channel in FPGA-SoCs" was published by researchers at TU Munich and Fraunhofer Research Institution AISEC. Abstract: "FPGA-SoCs are a popular platform for accelerating a wide range of applications due to their performance and flexibility. From a security point of view, these systems have been shown to be vulnerable to various attacks... » read more

Large Area Process For Atomically Thin 2D Semiconductor, Using Scalable ALD


A new technical paper titled "Large-area synthesis of high electrical performance MoS2  by a commercially scalable atomic layer deposition process" by researchers at the University of Southampton, LMU Munich, and VTT Technical Research Centre of Finland. Abstract: "This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required... » read more

CXL Memory: Detailed Characterization Analysis Using Micro-Benchmarks And Real Applications (UIUC, Intel Labs)


A new technical paper titled "Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices" was published by researchers at University of Illinois Urbana-Champaign (UIUC) and Intel Labs. Abstract: "The high demand for memory capacity in modern datacenters has led to multiple lines of innovation in memory expansion and disaggregation. One such effort is Compute eXpress Link (CXL)-based... » read more

Impact Of Increased IC Performance On Memory


Increasing performance in advanced semiconductors is becoming more difficult as chips become more complex. There are more physical effects to contend with, different use cases, and challenges in making memory go faster. In addition, aging effects that once were ignored are now becoming critical concerns. Steven Woo, fellow and distinguished inventor at Rambus, talks about different factors that... » read more

Do Necessary Tools Exist For RISC-V Verification?


Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

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