Microchip Sees Significant Productivity Gains In Mature-Node Custom IC Design With In-Design Signoff DRC


Microsemi pioneered the design of innovative chips that are used for multiple purposes across a variety of industries, using both mature and advanced process nodes. In mature node custom design implementation, layout designers still spend a significant amount of their valuable time fixing DRC errors—time that could be more beneficially spent ensuring their designs meet their PPA goals. By rep... » read more

Co-Packaged Optics And The Evolution Of Switch/Optical Interconnects In Data Centers


Driven by a need to reduce power and increase bandwidth density in data center network switches and other devices, the data networking industry is moving toward adoption of co-packaged optics (CPO). This paper provides a brief overview of the history of copper and optical interconnects, the limitations of existing interconnect solutions, and the future of co-packaged optics, including the benef... » read more

Blog Review: Oct. 27


Siemens EDA's Ray Salemi continues looking into using Python for verification by looking at how pyuvm simplifies and refactors the UVM TLM system to take advantage of the fact that Python has multiple inheritance and no typing. Cadence's Paul McLellan listens in as Larry Disenhof explains the impact that export regulations have on EDA tools and IP products and changes in a rapidly shifting l... » read more

Hierarchical Verification for EC-FPGA Flow


This document describes the methodology to apply EC-FPGA verification using hierarchical netlists. This approach is recommended in case the verification of the overall design has issues with convergence. The document contains a step-by-step description of different methods while providing reasoning for the soundness of each approach. It is assumed for this document that the reader is familiar w... » read more

The Road To Osmosis


It’s happening. Some may have speculated that, with the acquisition of OneSpin by Siemens, the OneSpin user group meeting, more commonly known as Osmosis, would be formally (pun intended) absorbed into a larger Siemens event. Well, I’m here to tell you that Osmosis is officially on the books and will continue to focus on the specific area of formal verification. The team has been working di... » read more

3D-IC Design Challenges And Requirements


As demands accelerate for increasing density, higher bandwidths, and lower power, many IC design and packaging teams are taking a close look at vertical stacking multiple chips and chiplets. This technology, called 3D-IC, promises many advantages over traditional single-die planar designs. Some are using the term “More-than-Moore” to describe the potential of this new technology. Integratio... » read more

Uniform Spin Qubit Devices with Tunable Coupling in an All-Silicon 300 mm Integrated Process


Abstract: Larger arrays of electron spin qubits require radical improvements in fabrication and device uniformity. Here we demonstrate excellent qubit device uniformity and tunability from 300K down to mK temperatures. This is achieved, for the first time, by integrating an overlapping polycrystalline silicon-based gate stack in an ‘all-Silicon’ and lithographically flexible 300mm flow. ... » read more

Manufacturing Bits: Oct. 26


GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Strategies For Meeting Stringent Standards For Automotive ICs


It may surprise you, but when it comes to chips in electronic braking systems, airbag control units, and more, automotive manufacturers are still using 10-year-old technology — and with good reason. For the automotive industry, the reliability, stability, and robustness of electronic components are critical, especially when it comes to meeting the stringent Automotive Electronics Council (... » read more

Power/Performance Bits: Oct. 26


Printing circuits on irregular shapes Researchers at Pennsylvania State University propose a way to print biodegradable circuits on irregular, complex shapes. “We are trying to enable direct fabrication of circuits on freeform, 3-D geometries,” said Huanyu “Larry” Cheng, professor in Penn State's Department of Engineering Science and Mechanics (ESM). “Printing on complicated objec... » read more

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