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Hierarchical Verification for EC-FPGA Flow

How to apply EC-FPGA verification using hierarchical netlists.

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This document describes the methodology to apply EC-FPGA verification using hierarchical netlists. This approach is recommended in case the verification of the overall design has issues with convergence. The document contains a step-by-step description of different methods while providing reasoning for the soundness of each approach. It is assumed for this document that the reader is familiar with the basics of the equivalence checking process using OneSpin 360 EC-FPGA.

Note: The white paper is also called “Hierarchical OneSpin 360 ECFPGA Flow.” OneSpin is now part of Siemens.

Click here to access the paper.



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