Accellera’s Functional Safety Group White Paper
By Technical Paper Link - 11 May, 2021 - Comments: 0

"The objective of the Functional Safety Working Group is to standardize information for capturing and propagating the safety intent from the system down to the SoC / IP design and implementation including failure mode propagation, verification, validation, reliability and Safety Mechanisms. The safety intent standardization will support data exchange and traceability across different safety ana... » read more

Recalculating The Cost Of Test
By Ed Sperling - 11 May, 2021 - Comments: 0

The cost of test is rising. For decades, test was limited to a flat 2% of the cost of designing and manufacturing a chip. Today, no one is quite sure what that cost really is, and there doesn't seem to be any single formula for determining it. In some cases, there isn't even a sense of urgency to finding out. Several significant changes are occurring that make any formula difficult to cal... » read more

Understanding Optical Inspection For CIS
By Woo Young Han - 11 May, 2021 - Comments: 0

The demand for smartphone cameras, video conferencing, surveillance and autonomous driving has fueled explosive growth of CMOS image sensor (CIS) manufacturing in the last decade. While CIS becomes an increasingly important element in the production of today’s consumer electronics, there are unique challenges in production that must be addressed. As pixel sizes shrink, we see an inverse relat... » read more

In-Chip Sensing And PVT Monitoring: Not Just An Insurance Policy
By Ramsay Allen - 11 May, 2021 - Comments: 0

You wouldn’t drive an expensive car without insurance or take a flight in an aircraft without performing instrument and control surface checks. So why would you take the risk of designing a multi-million dollar advanced node semiconductor device without making sure you are aware of, and able to manage, the dynamic conditions that had the potential to make or break a silicon product? Advanced... » read more

Chip Monitoring And Test Collaborate
By Bryon Moyer - 11 May, 2021 - Comments: 0

As on-chip monitoring becomes more prevalent in complex advanced-node ICs, it’s easy to question whether or not it conflicts with conventional silicon testing. It might even supplant such testing in the future. Or alternatively, they could interact, with each supporting the other. “On-chip monitors provide fine-grained observability into effects and issues that are otherwise difficult or... » read more

Testing AiP Modules In High-Volume Production
By Jose Moreira - 11 May, 2021 - Comments: 0

Far-field and radiating near-field are two options for high-volume over-the-air (OTA) testing of antenna-in-package (AiP) modules with automated test equipment (ATE) [1]. In this article, we define an AiP device under test (DUT) and examine the measurement results from both methods. Creating an AiP evaluation vehicle Proper evaluation of an ATE OTA measurement setup requires an AiP module. Us... » read more

Testing Analog Circuits Becoming More Difficult
By SE Staff - 11 May, 2021 - Comments: 1

Foundries and packaging houses are wrestling how to control heat in the testing phase, particularly as devices continue to shrink and as thermally sensitive analog circuits are added into SoCs and advanced packages to support everything from RF to AI. The overriding problem is that heat can damage chips or devices under test. That's certainly true for digital chips developed at advanced node... » read more

Chasing Test Escapes In IC Manufacturing
By Anne Meixner - 11 May, 2021 - Comments: 0

The number of bad chips that slip through testing and end up in the field can be significantly reduced before those devices ever leave the fab, but the cost of developing the necessary tests and analyzing the data has sharply limited adoption. Determining an acceptable test escape metric for an IC is essential to improving the yield-to-quality ratio in chip manufacturing, but what exactly is... » read more

Cryostats Enable Astrophysics Research
By Paul Owen - 11 May, 2021 - Comments: 0

Imagine designing and building two prototype HPD cryostats for the Submillimeter Array on Maunakea in Hawaii. The SMA is a collaborative project between the Smithsonian Astrophysical Observatory (SAO, a member of the Center for Astrophysics | Harvard & Smithsonian) and the Academia Sinica Institute of Astronomy and Astrophysics. The SMA consists of eight radio telescopes operating fro... » read more

Acoustic Metrology for Fine Pitch Microbumps in 3D IC
By Onto Innovation - 11 May, 2021 - Comments: 0

The continuing shift to 3D integration requires formation of electrical interconnects between multiple vertically stacked Si devices to enable high speed, high bandwidth connections. Microbumps and through silicon vias (TSVs) enable the high-density interconnects for die-to-die and die-to-wafer stacking for different applications. In this paper, we present acoustic metrology techniques for the ... » read more

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